diff --git a/README.md b/README.md
index 07cd09856a..f92b320621 100644
--- a/README.md
+++ b/README.md
@@ -191,6 +191,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32F100RB | [STM32VLDISCOVERY](https://www.st.com/en/evaluation-tools/stm32vldiscovery.html) | 0.2.1 | |
| :green_heart: | STM32F303VC | [STM32F3DISCOVERY](https://www.st.com/en/evaluation-tools/stm32f3discovery.html) | *2.0.0* | |
| :green_heart: | STM32F407VG | [STM32F407G-DISC1](http://www.st.com/en/evaluation-tools/stm32f4discovery.html) | *0.1.0* | |
+| :yellow_heart: | STM32F411VE | [STM32F411E-DISCO](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) | **2.12.0** | |
| :green_heart: | STM32F413ZH | [32F413HDISCOVERY](https://www.st.com/en/evaluation-tools/32f413hdiscovery.html) | *1.9.0* | |
| :green_heart: | STM32F746NG | [STM32F746G-DISCOVERY](http://www.st.com/en/evaluation-tools/32f746gdiscovery.html) | *0.1.0* | |
| :green_heart: | STM32G031J6 | [STM32G0316-DISCO](https://www.st.com/en/evaluation-tools/stm32g0316-disco.html) | *1.9.0* | |
@@ -389,6 +390,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32F410T8
STM32F410TB | Generic Board | *2.4.0* | |
| :green_heart: | STM32F411CC
STM32F411CE | Generic Board | *1.9.0* | |
| :green_heart: | STM32F411RC
STM32F411RE | Generic Board | *1.9.0* | |
+| :yellow_heart: | STM32F411VC
STM32F411VE | Generic Board | **2.12.0** | |
| :green_heart: | STM32F412CE
STM32F412CG | Generic Board | *1.9.0* | |
| :green_heart: | STM32F412RE
STM32F412RG | Generic Board | *1.9.0* | |
| :green_heart: | STM32F412ZE
STM32F412ZG | Generic Board | *2.6.0* | |
diff --git a/boards.txt b/boards.txt
index 70e6ab6f95..742e45f479 100644
--- a/boards.txt
+++ b/boards.txt
@@ -1421,6 +1421,20 @@ Disco.menu.pnum.DISCO_F407VG.build.variant=STM32F4xx/F407V(E-G)T_F417V(E-G)T
Disco.menu.pnum.DISCO_F407VG.openocd.target=stm32f4x
Disco.menu.pnum.DISCO_F407VG.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F407.svd
+# DISCO_F411VE board
+Disco.menu.pnum.DISCO_F411VE=STM32F411E-DISCO
+Disco.menu.pnum.DISCO_F411VE.upload.maximum_size=524288
+Disco.menu.pnum.DISCO_F411VE.upload.maximum_data_size=131072
+Disco.menu.pnum.DISCO_F411VE.build.mcu=cortex-m4
+Disco.menu.pnum.DISCO_F411VE.build.fpu=-mfpu=fpv4-sp-d16
+Disco.menu.pnum.DISCO_F411VE.build.float-abi=-mfloat-abi=hard
+Disco.menu.pnum.DISCO_F411VE.build.board=DISCO_F411VE
+Disco.menu.pnum.DISCO_F411VE.build.series=STM32F4xx
+Disco.menu.pnum.DISCO_F411VE.build.product_line=STM32F411xE
+Disco.menu.pnum.DISCO_F411VE.build.variant=STM32F4xx/F411V(C-E)T
+Disco.menu.pnum.DISCO_F411VE.openocd.target=stm32f4x
+Disco.menu.pnum.DISCO_F411VE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd
+
# DISCO_F413ZH board
Disco.menu.pnum.DISCO_F413ZH=STM32F413H-DISCO
Disco.menu.pnum.DISCO_F413ZH.node=DIS_F413ZH
@@ -5258,6 +5272,24 @@ GenF4.menu.pnum.GENERIC_F411RETX.build.product_line=STM32F411xE
GenF4.menu.pnum.GENERIC_F411RETX.build.variant=STM32F4xx/F411R(C-E)T
GenF4.menu.pnum.GENERIC_F411RETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd
+# Generic F411VCTx
+GenF4.menu.pnum.GENERIC_F411VCTX=Generic F411VCTx
+GenF4.menu.pnum.GENERIC_F411VCTX.upload.maximum_size=262144
+GenF4.menu.pnum.GENERIC_F411VCTX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F411VCTX.build.board=GENERIC_F411VCTX
+GenF4.menu.pnum.GENERIC_F411VCTX.build.product_line=STM32F411xE
+GenF4.menu.pnum.GENERIC_F411VCTX.build.variant=STM32F4xx/F411V(C-E)T
+GenF4.menu.pnum.GENERIC_F411VCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd
+
+# Generic F411VETx
+GenF4.menu.pnum.GENERIC_F411VETX=Generic F411VETx
+GenF4.menu.pnum.GENERIC_F411VETX.upload.maximum_size=524288
+GenF4.menu.pnum.GENERIC_F411VETX.upload.maximum_data_size=131072
+GenF4.menu.pnum.GENERIC_F411VETX.build.board=GENERIC_F411VETX
+GenF4.menu.pnum.GENERIC_F411VETX.build.product_line=STM32F411xE
+GenF4.menu.pnum.GENERIC_F411VETX.build.variant=STM32F4xx/F411V(C-E)T
+GenF4.menu.pnum.GENERIC_F411VETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F4xx/STM32F411.svd
+
# Generic F412CEUx
GenF4.menu.pnum.GENERIC_F412CEUX=Generic F412CEUx
GenF4.menu.pnum.GENERIC_F412CEUX.upload.maximum_size=524288
diff --git a/variants/STM32F4xx/F411V(C-E)T/CMakeLists.txt b/variants/STM32F4xx/F411V(C-E)T/CMakeLists.txt
index 2a4d55b6b1..1aecc9cfb3 100644
--- a/variants/STM32F4xx/F411V(C-E)T/CMakeLists.txt
+++ b/variants/STM32F4xx/F411V(C-E)T/CMakeLists.txt
@@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
generic_clock.c
PeripheralPins.c
variant_generic.cpp
+ variant_DISCO_F411VE.cpp
)
target_link_libraries(variant_bin PUBLIC variant_usage)
diff --git a/variants/STM32F4xx/F411V(C-E)T/generic_clock.c b/variants/STM32F4xx/F411V(C-E)T/generic_clock.c
index bf8bb0b6cf..16eb085be5 100644
--- a/variants/STM32F4xx/F411V(C-E)T/generic_clock.c
+++ b/variants/STM32F4xx/F411V(C-E)T/generic_clock.c
@@ -20,8 +20,42 @@
*/
WEAK void SystemClock_Config(void)
{
- /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_RCC_PWR_CLK_ENABLE();
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = 16;
+ RCC_OscInitStruct.PLL.PLLN = 192;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = 4;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
+ Error_Handler();
+ }
}
#endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32F4xx/F411V(C-E)T/ldscript.ld b/variants/STM32F4xx/F411V(C-E)T/ldscript.ld
new file mode 100644
index 0000000000..3f1681174f
--- /dev/null
+++ b/variants/STM32F4xx/F411V(C-E)T/ldscript.ld
@@ -0,0 +1,188 @@
+/*
+******************************************************************************
+**
+** @file : LinkerScript.ld
+**
+** @author : Auto-generated by STM32CubeIDE
+**
+** @brief : Linker script for STM32F411VETx Device from STM32F4 series
+** 512KBytes FLASH
+** 128KBytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2025 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32F4xx/F411V(C-E)T/variant_DISCO_F411VE.cpp b/variants/STM32F4xx/F411V(C-E)T/variant_DISCO_F411VE.cpp
new file mode 100644
index 0000000000..55de45797d
--- /dev/null
+++ b/variants/STM32F4xx/F411V(C-E)T/variant_DISCO_F411VE.cpp
@@ -0,0 +1,191 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2011-2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#if defined(ARDUINO_DISCO_F411VE)
+
+#include "pins_arduino.h"
+
+// Pin number
+const PinName digitalPin[] = {
+ //P1 connector Right side
+ PC_0, //D0/A10
+ PC_2, //D1/A12
+ PA_0, //D2/A0
+ PA_2, //D3/A2
+ PA_4, //D4/A4
+ PA_6, //D5/A6
+ PC_4, //D6/A14
+ PB_0, //D7/A8
+ PB_2, //D8
+ PE_8, //D9
+ PE_10, //D10
+ PE_12, //D11
+ PE_14, //D12
+ PB_10, //D13
+ PB_12, //D14
+ PB_14, //D15
+ PD_8, //D16
+ PD_10, //D17
+ PD_12, //D18
+ PD_14, //D19
+ //P2 connector Left side
+ PH_0, //D20
+ PC_14, //D21
+ PE_6, //D22
+ PE_4, //D23
+ PE_2, //D24
+ PE_0, //D25
+ PB_8, //D26
+ PB_6, //D27
+ PB_4, //D28
+ PD_7, //D29
+ PD_5, //D30
+ PD_3, //D31
+ PD_1, //D32
+ PC_12, //D33
+ PC_10, //D34
+ PA_14, //D35
+ PA_10, //D36
+ PA_8, //D37
+ PC_8, //D38
+ PC_6, //D39
+ //P1 Connector Left Side
+ PC_1, //D40/A11
+ PC_3, //D41/A13
+ PA_1, //D42/A1
+ PA_3, //D43/A3
+ PA_5, //D44/A5
+ PA_7, //D45/A7
+ PC_5, //D46/A15
+ PB_1, //D47/A9
+ PE_7, //D48
+ PE_9, //D49
+ PE_11, //D50
+ PE_13, //D51
+ PE_15, //D52
+ PB_13, //D53
+ PB_15, //D54
+ PD_9, //D55
+ PD_11, //D56
+ PD_13, //D57
+ PD_15, //D58
+ //P2 connector Right side
+ PH_1, //D59
+ PC_15, //D60
+ PC_13, //D61
+ PE_5, //D62
+ PE_3, //D63
+ PE_1, //D64
+ PB_9, //D65
+ PB_7, //D66
+ PB_5, //D67
+ PB_3, //D68
+ PD_6, //D69
+ PD_4, //D70
+ PD_2, //D71
+ PD_0, //D72
+ PC_11, //D73
+ PA_15, //D74
+ PA_13, //D75
+ PA_9, //D76
+ PC_9, //D77
+ PC_7, //D78
+ //CN5 USB USER connector
+ PA_11, //D79
+ PA_12 //D80
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+ 2, //A0
+ 42, //A1
+ 3, //A2
+ 43, //A3
+ 4, //A4
+ 44, //A5
+ 5, //A6
+ 45, //A7
+ 7, //A8
+ 47, //A9
+ 0, //A10
+ 40, //A11
+ 1, //A12
+ 41, //A13
+ 6, //A14
+ 46 //A15
+};
+
+// ----------------------------------------------------------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+WEAK void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_RCC_PWR_CLK_ENABLE();
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLM = 4;
+ RCC_OscInitStruct.PLL.PLLN = 192;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+ RCC_OscInitStruct.PLL.PLLQ = 4;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the peripherals clock
+ */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
+ PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
+ PeriphClkInitStruct.PLLI2S.PLLI2SM = 4;
+ PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ARDUINO_DISCO_F411VE */
diff --git a/variants/STM32F4xx/F411V(C-E)T/variant_DISCO_F411VE.h b/variants/STM32F4xx/F411V(C-E)T/variant_DISCO_F411VE.h
new file mode 100644
index 0000000000..b2ca6f65b2
--- /dev/null
+++ b/variants/STM32F4xx/F411V(C-E)T/variant_DISCO_F411VE.h
@@ -0,0 +1,237 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2025, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/*----------------------------------------------------------------------------
+ * STM32 pins number
+ *----------------------------------------------------------------------------*/
+
+//P1 connector Right side
+#define PC0 PIN_A10
+#define PC2 PIN_A12
+#define PA0 PIN_A0
+#define PA2 PIN_A2
+#define PA4 PIN_A4
+#define PA6 PIN_A6
+#define PC4 PIN_A14
+#define PB0 PIN_A8
+#define PB2 8
+#define PE8 9
+#define PE10 10
+#define PE12 11
+#define PE14 12
+#define PB10 13
+#define PB12 14
+#define PB14 15
+#define PD8 16
+#define PD10 17
+#define PD12 18
+#define PD14 19
+//P2 connector Left side
+#define PH0 20
+#define PC14 21
+#define PE6 22
+#define PE4 23
+#define PE2 24
+#define PE0 25
+#define PB8 26
+#define PB6 27
+#define PB4 28
+#define PD7 29
+#define PD5 30
+#define PD3 31
+#define PD1 32
+#define PC12 33
+#define PC10 34
+#define PA14 35
+#define PA10 36
+#define PA8 37
+#define PC8 38
+#define PC6 39
+//P1 Connector Left Side
+#define PC1 PIN_A11
+#define PC3 PIN_A13
+#define PA1 PIN_A1
+#define PA3 PIN_A3
+#define PA5 PIN_A5
+#define PA7 PIN_A7
+#define PC5 PIN_A15
+#define PB1 PIN_A9
+#define PE7 48
+#define PE9 49
+#define PE11 50
+#define PE13 51
+#define PE15 52
+#define PB13 53
+#define PB15 54
+#define PD9 55
+#define PD11 56
+#define PD13 57
+#define PD15 58
+//P2 connector Right side
+#define PH1 59
+#define PC15 60
+#define PC13 61
+#define PE5 62
+#define PE3 63
+#define PE1 64
+#define PB9 65
+#define PB7 66
+#define PB5 67
+#define PB3 68
+#define PD6 69
+#define PD4 70
+#define PD2 71
+#define PD0 72
+#define PC11 73
+#define PA15 74
+#define PA13 75
+#define PA9 76
+#define PC9 77
+#define PC7 78
+//CN5 USB USER connector
+#define PA11 79
+#define PA12 80
+
+// Alternate pins number
+#define PA0_ALT1 (PA0 | ALT1)
+#define PA1_ALT1 (PA1 | ALT1)
+#define PA2_ALT1 (PA2 | ALT1)
+#define PA2_ALT2 (PA2 | ALT2)
+#define PA3_ALT1 (PA3 | ALT1)
+#define PA3_ALT2 (PA3 | ALT2)
+#define PA4_ALT1 (PA4 | ALT1)
+#define PA7_ALT1 (PA7 | ALT1)
+#define PA15_ALT1 (PA15 | ALT1)
+#define PB0_ALT1 (PB0 | ALT1)
+#define PB1_ALT1 (PB1 | ALT1)
+#define PB3_ALT1 (PB3 | ALT1)
+#define PB4_ALT1 (PB4 | ALT1)
+#define PB5_ALT1 (PB5 | ALT1)
+#define PB8_ALT1 (PB8 | ALT1)
+#define PB9_ALT1 (PB9 | ALT1)
+#define PB12_ALT1 (PB12 | ALT1)
+#define PB13_ALT1 (PB13 | ALT1)
+#define PE2_ALT1 (PE2 | ALT1)
+#define PE4_ALT1 (PE4 | ALT1)
+#define PE5_ALT1 (PE5 | ALT1)
+#define PE6_ALT1 (PE6 | ALT1)
+#define PE11_ALT1 (PE11 | ALT1)
+#define PE12_ALT1 (PE12 | ALT1)
+#define PE13_ALT1 (PE13 | ALT1)
+#define PE14_ALT1 (PE14 | ALT1)
+
+#define NUM_DIGITAL_PINS 81
+#define NUM_ANALOG_INPUTS 16
+
+// On-board LED pin number
+#define LED_GREEN PD12
+#define LED_BLUE PD15
+#define LED_RED PD14
+#define LED_ORANGE PD13
+#ifndef LED_BUILTIN
+ #define LED_BUILTIN LED_GREEN
+#endif
+
+// On-board user button
+#ifndef USER_BTN
+ #define USER_BTN PA0
+#endif
+
+// SPI definitions
+#ifndef PIN_SPI_SS
+ #define PIN_SPI_SS PE3
+#endif
+#ifndef PIN_SPI_SS1
+ #define PIN_SPI_SS1 PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_SS2
+ #define PIN_SPI_SS2 PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_SS3
+ #define PIN_SPI_SS3 PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_MOSI
+ #define PIN_SPI_MOSI PA7
+#endif
+#ifndef PIN_SPI_MISO
+ #define PIN_SPI_MISO PA6
+#endif
+#ifndef PIN_SPI_SCK
+ #define PIN_SPI_SCK PA5
+#endif
+
+// I2C definitions
+#ifndef PIN_WIRE_SDA
+ #define PIN_WIRE_SDA PB9
+#endif
+#ifndef PIN_WIRE_SCL
+ #define PIN_WIRE_SCL PB6
+#endif
+
+// Timer Definitions
+#ifndef TIMER_TONE
+ #define TIMER_TONE TIM10
+#endif
+#ifndef TIMER_SERVO
+ #define TIMER_SERVO TIM11
+#endif
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+ #define SERIAL_UART_INSTANCE 2 //Connected to ST-Link
+#endif
+
+// Default pin used for 'Serial' instance (ex: ST-Link)
+// Mandatory for Firmata
+// By default not connected to ST-Link as
+// SB10 and SB11 not fitted on the board.
+#ifndef PIN_SERIAL_RX
+ #define PIN_SERIAL_RX PA3
+#endif
+#ifndef PIN_SERIAL_TX
+ #define PIN_SERIAL_TX PA2
+#endif
+
+// Extra HAL modules
+#if !defined(HAL_SD_MODULE_DISABLED)
+ #define HAL_SD_MODULE_ENABLED
+#endif
+
+/*----------------------------------------------------------------------------
+ * Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ // These serial port names are intended to allow libraries and architecture-neutral
+ // sketches to automatically default to the correct port name for a particular type
+ // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+ // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+ //
+ // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
+ //
+ // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
+ //
+ // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
+ //
+ // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
+ //
+ // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
+ // pins are NOT connected to anything by default.
+ #ifndef SERIAL_PORT_MONITOR
+ #define SERIAL_PORT_MONITOR Serial
+ #endif
+ #ifndef SERIAL_PORT_HARDWARE
+ #define SERIAL_PORT_HARDWARE Serial
+ #endif
+#endif