Skip to content

Commit 8169775

Browse files
fpistmfpistm
committed
Enhance SD configuration
Signed-off-by: Frederic.Pillon <[email protected]>
1 parent 9bdf6df commit 8169775

File tree

2 files changed

+92
-35
lines changed

2 files changed

+92
-35
lines changed

‎README.md

Lines changed: 28 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,32 @@ This library provides a default user defined options file named `ffconf_default.
2626
User can provide his own defined options by adding his configuration in a file named
2727
`ffconf_custom.h` at sketch level or in variant folder.
2828

29-
### SD detect and timeout
30-
* `SD_DETECT_PIN` pin number can be defined in `variant.h` or using `build_opt.h`.
29+
### SD
3130

32-
* `SD_DATATIMEOUT` constant for Read/Write block could be redefined in `variant.h` or using `build_opt.h`
31+
Some default definitions can be overridden using:
32+
* board `variant.h`
33+
* `build_opt.h`: see [Customize build options](https://github.com/stm32duino/wiki/wiki/Customize-build-options-using-build_opt.h)
34+
35+
* `hal_conf_extra.h`: see [HAL configuration](https://github.com/stm32duino/wiki/wiki/HAL-configuration)
36+
37+
38+
#### SD configurations
39+
40+
* `SD_INSTANCE`: some STM32 can have 2 SD peripherals `SDMMC1` and `SDMMC2`, note that this library can managed only one peripheral
41+
* `SDMMC1` (default)
42+
* `SDMMC2`
43+
44+
* `SD_HW_FLOW_CTRL`: specifies whether the SDMMC hardware flow control is enabled or disabled
45+
* `SD_HW_FLOW_CTRL_ENABLE`
46+
* `SD_HW_FLOW_CTRL_DISABLE` (default)
47+
48+
* `SD_BUS_WIDE`: specifies the SDMMC bus width
49+
* `SD_BUS_WIDE_1B`
50+
* `SD_BUS_WIDE_4B` (default)
51+
* `SD_BUS_WIDE_8B`
52+
53+
54+
#### SD detect and timeout
55+
* `SD_DETECT_PIN` pin number
56+
57+
* `SD_DATATIMEOUT` constant for Read/Write block

‎src/bsp_sd.c

Lines changed: 64 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -39,42 +39,59 @@
3939
#include "PeripheralPins.h"
4040
#include "stm32yyxx_ll_gpio.h"
4141

42-
#ifdef SDMMC1
4342
/* Definition for BSP SD */
44-
#define SD_INSTANCE SDMMC1
45-
#define SD_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
46-
#define SD_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
47-
#define SD_CLK_EDGE SDMMC_CLOCK_EDGE_RISING
48-
#define SD_CLK_BYPASS SDMMC_CLOCK_BYPASS_DISABLE
49-
#define SD_CLK_PWR_SAVE SDMMC_CLOCK_POWER_SAVE_DISABLE
50-
#define SD_BUS_WIDE_1B SDMMC_BUS_WIDE_1B
51-
#define SD_BUS_WIDE_4B SDMMC_BUS_WIDE_4B
52-
#ifndef SD_HW_FLOW_CTRL
53-
#define SD_HW_FLOW_CTRL SDMMC_HARDWARE_FLOW_CONTROL_DISABLE
43+
#if defined(SDMMC1) || defined(SDMMC2)
44+
#ifndef SD_INSTANCE
45+
#define SD_INSTANCE SDMMC1
46+
#endif
47+
48+
#define SD_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
49+
#define SD_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
50+
#ifdef SDMMC2
51+
#define SD_CLK2_ENABLE __HAL_RCC_SDMMC2_CLK_ENABLE
52+
#define SD_CLK2_DISABLE __HAL_RCC_SDMMC2_CLK_DISABLE
5453
#endif
54+
55+
#define SD_CLK_EDGE SDMMC_CLOCK_EDGE_RISING
56+
#define SD_CLK_BYPASS SDMMC_CLOCK_BYPASS_DISABLE
57+
#define SD_CLK_PWR_SAVE SDMMC_CLOCK_POWER_SAVE_DISABLE
58+
#define SD_BUS_WIDE_1B SDMMC_BUS_WIDE_1B
59+
#define SD_BUS_WIDE_4B SDMMC_BUS_WIDE_4B
60+
#define SD_BUS_WIDE_8B SDMMC_BUS_WIDE_8B
61+
#define SD_HW_FLOW_CTRL_ENABLE SDMMC_HARDWARE_FLOW_CONTROL_ENABLE
62+
#define SD_HW_FLOW_CTRL_DISABLE SDMMC_HARDWARE_FLOW_CONTROL_DISABLE
63+
5564
#ifdef STM32H7xx
56-
#define SD_CLK_DIV 1
65+
#define SD_CLK_DIV 1
5766
#else
58-
#define SD_CLK_DIV SDMMC_TRANSFER_CLK_DIV
67+
#define SD_CLK_DIV SDMMC_TRANSFER_CLK_DIV
5968
#endif
69+
6070
#elif defined(SDIO)
61-
/* Definition for BSP SD */
62-
#define SD_INSTANCE SDIO
63-
#define SD_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
64-
#define SD_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
65-
#define SD_CLK_EDGE SDIO_CLOCK_EDGE_RISING
66-
#define SD_CLK_BYPASS SDIO_CLOCK_BYPASS_DISABLE
67-
#define SD_CLK_PWR_SAVE SDIO_CLOCK_POWER_SAVE_DISABLE
68-
#define SD_BUS_WIDE_1B SDIO_BUS_WIDE_1B
69-
#define SD_BUS_WIDE_4B SDIO_BUS_WIDE_4B
70-
#ifndef SD_HW_FLOW_CTRL
71-
#define SD_HW_FLOW_CTRL SDIO_HARDWARE_FLOW_CONTROL_DISABLE
72-
#endif
73-
#define SD_CLK_DIV SDIO_TRANSFER_CLK_DIV
71+
#define SD_INSTANCE SDIO
72+
#define SD_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
73+
#define SD_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
74+
#define SD_CLK_EDGE SDIO_CLOCK_EDGE_RISING
75+
#define SD_CLK_BYPASS SDIO_CLOCK_BYPASS_DISABLE
76+
#define SD_CLK_PWR_SAVE SDIO_CLOCK_POWER_SAVE_DISABLE
77+
#define SD_BUS_WIDE_1B SDIO_BUS_WIDE_1B
78+
#define SD_BUS_WIDE_4B SDIO_BUS_WIDE_4B
79+
#define SD_BUS_WIDE_8B SDIO_BUS_WIDE_8B
80+
#define SD_HW_FLOW_CTRL_ENABLE SDIO_HARDWARE_FLOW_CONTROL_ENABLE
81+
#define SD_HW_FLOW_CTRL_DISABLE SDIO_HARDWARE_FLOW_CONTROL_DISABLE
82+
#define SD_CLK_DIV SDIO_TRANSFER_CLK_DIV
7483
#else
7584
#error "Unknown SD_INSTANCE"
7685
#endif
7786

87+
#ifndef SD_HW_FLOW_CTRL
88+
#define SD_HW_FLOW_CTRL SD_HW_FLOW_CTRL_DISABLE
89+
#endif
90+
91+
#ifndef SD_BUS_WIDE
92+
#define SD_BUS_WIDE SD_BUS_WIDE_4B
93+
#endif
94+
7895
/* BSP SD Private Variables */
7996
static SD_HandleTypeDef uSdHandle;
8097
static uint32_t SD_detect_ll_gpio_pin = LL_GPIO_PIN_ALL;
@@ -132,7 +149,7 @@ uint8_t BSP_SD_Init(void)
132149
/* Configure SD Bus width */
133150
if (sd_state == MSD_OK) {
134151
/* Enable wide operation */
135-
if (HAL_SD_WideBusOperation_Config(&uSdHandle, SD_BUS_WIDE_4B) != SD_OK) {
152+
if (HAL_SD_WideBusOperation_Config(&uSdHandle, SD_BUS_WIDE) != SD_OK) {
136153
sd_state = MSD_ERROR;
137154
} else {
138155
sd_state = MSD_OK;
@@ -157,7 +174,6 @@ uint8_t BSP_SD_DeInit(void)
157174
}
158175

159176
/* Msp SD deinitialization */
160-
uSdHandle.Instance = SD_INSTANCE;
161177
BSP_SD_MspDeInit(&uSdHandle, NULL);
162178

163179
return sd_state;
@@ -354,7 +370,6 @@ uint8_t BSP_SD_Erase(uint64_t StartAddr, uint64_t EndAddr)
354370
*/
355371
__weak void BSP_SD_MspInit(SD_HandleTypeDef *hsd, void *Params)
356372
{
357-
UNUSED(hsd);
358373
UNUSED(Params);
359374

360375
/* Configure SD GPIOs */
@@ -364,8 +379,17 @@ __weak void BSP_SD_MspInit(SD_HandleTypeDef *hsd, void *Params)
364379
map++;
365380
}
366381

367-
/* Enable SDIO clock */
382+
/* Enable SD clock */
383+
#if defined(SDMMC1) && defined(SDMMC2)
384+
if (hsd->Instance == SDMMC1) {
385+
SD_CLK_ENABLE();
386+
} else {
387+
SD_CLK2_ENABLE();
388+
}
389+
#else
390+
UNUSED(hsd);
368391
SD_CLK_ENABLE();
392+
#endif
369393
}
370394

371395
/**
@@ -395,14 +419,22 @@ __weak void BSP_SD_Detect_MspInit(SD_HandleTypeDef *hsd, void *Params)
395419
*/
396420
__weak void BSP_SD_MspDeInit(SD_HandleTypeDef *hsd, void *Params)
397421
{
398-
UNUSED(hsd);
399422
UNUSED(Params);
400423

401424
/* DeInit GPIO pins can be done in the application
402425
(by surcharging this __weak function) */
403426

404-
/* Disable SDIO clock */
427+
/* Disable SD clock */
428+
#if defined(SDMMC1) && defined(SDMMC2)
429+
if (hsd->Instance == SDMMC1) {
430+
SD_CLK_DISABLE();
431+
} else {
432+
SD_CLK2_DISABLE();
433+
}
434+
#else
435+
UNUSED(hsd);
405436
SD_CLK_DISABLE();
437+
#endif
406438
}
407439

408440
#ifndef STM32L1xx

0 commit comments

Comments
 (0)