🐛 [rtl] fix CLZ and CTZ instructions (#1397)

Author: stnolting

CHANGELOG.md

@@ -29,7 +29,8 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12
 
 | Date | Version | Comment | Ticket |
 |:----:|:-------:|:--------|:------:|
-| 05.10.2025 | 1.12.3.1 | rework debug module | [#1396](https://github.com/stnolting/neorv32/pull/1396) |
+| 06.10.2025 | 1.12.3.2 | :bug: fix `clz` and `ctz` instructions; bug introduced in #1395 (v1.12.2.9) | [#1397](https://github.com/stnolting/neorv32/pull/1397) |
+| 05.10.2025 | 1.12.3.1 | rework debug module (DM) - slightly faster response, less hardware utilization, cleaner code | [#1396](https://github.com/stnolting/neorv32/pull/1396) |
 | 05.10.2025 | [**1.12.3**](https://github.com/stnolting/neorv32/releases/tag/v1.12.3) | :rocket: **New release** | |
 | 04.10.2025 | 1.12.2.9 | minor rtl edits and cleanups | [#1395](https://github.com/stnolting/neorv32/pull/1395) |
 | 04.10.2025 | 1.12.2.8 | :bug: fix broken DTM bypass register; further DTM logic optimization | [#1393](https://github.com/stnolting/neorv32/pull/1393) |
@@ -560,4 +561,4 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12
 | 29.06.2022 | 1.7.3.2 | :test_tube: add experimental core complex wrapper for integration into the [**LiteX**](https://github.com/enjoy-digital/litex) SoC builder framework | [#353](https://github.com/stnolting/neorv32/pull/353) |
 | 28.06.2022 | 1.7.3.1 | :bug: fix bug that caused permanent CPU stall if illegal load/store instruction | [#356](https://github.com/stnolting/neorv32/pull/356) |
 | 23.06.2022 | [**1.7.3**](https://github.com/stnolting/neorv32/releases/tag/v1.7.3) | :rocket: **New release** | |
-| ...        | ...     | Changelog trimmed. See [`CHANGELOG.md` in v1.7.3](https://github.com/stnolting/neorv32/blob/v1.7.3/CHANGELOG.md) to see older logs. | ... |
+| ...        | ...     | Changelog trimmed. See [`CHANGELOG.md` in v1.7.3](https://github.com/stnolting/neorv32/blob/v1.7.3/CHANGELOG.md) for older logs. | ... |

rtl/core/neorv32_cpu_cp_bitmanip.vhd

@@ -59,10 +59,10 @@ architecture neorv32_cpu_cp_bitmanip_rtl of neorv32_cpu_cp_bitmanip is
       if (input(i) = '0') then
         cnt_v := cnt_v + 1;
       else
-        return cnt_v;
+        exit;
       end if;
     end loop;
-    return 0;
+    return cnt_v;
   end function leading_zeros_f;
 
   -- population count (number of set bits) --

rtl/core/neorv32_package.vhd

@@ -20,7 +20,7 @@ package neorv32_package is
 
   -- Architecture Constants -----------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  constant hw_version_c  : std_ulogic_vector(31 downto 0) := x"01120301"; -- hardware version
+  constant hw_version_c  : std_ulogic_vector(31 downto 0) := x"01120302"; -- hardware version
   constant archid_c      : natural := 19; -- official RISC-V architecture ID
   constant XLEN          : natural := 32; -- native data path width
   constant int_bus_tmo_c : natural := 16; -- internal bus timeout window; has to be a power of two