GCC supports ISA extenstion split A into zaamo and zalrsc

[NikLeberg]

Hey there @stnolting

Quick heads-up: I found that GCC finally supports emit of lr/sc sequences for the builtin atomic operations with setting -march=<as usual>_zalrsc.

https://godbolt.org/z/j39MoeeKv

I just love how risc-v keeps on getting better bit-by-bit. 😍

[stnolting]

Oh that's nice! Now I really need to check if newlib also supports stdatomic.h... then we could remove this manual AMO emulation library. 🤔

I wonder if GCC also supports built-in defines for that so that we could concretize those __riscv_atomic ifdefs:

neorv32/sw/lib/include/neorv32_cpu_amo.h

Lines 31 to 45 in f1069d1

	inline uint32_t __attribute__ ((always_inline)) neorv32_cpu_amolr(uint32_t addr) {
	#if defined __riscv_atomic
	uint32_t amo_addr = addr;
	uint32_t amo_rdata;
	asm volatile ("lr.w %[dst], 0(%[addr])" : [dst] "=r" (amo_rdata) : [addr] "r" (amo_addr));
	return amo_rdata;
	#else
	(void)addr;
	return 0;
	#endif
	}

I just love how risc-v keeps on getting better bit-by-bit. 😍

Absolutely! ❤️

[NikLeberg]

If newlib does not support stdatomic.h one could also just use the actual atomic operations that GCC uses internally to implement the stdatomic ones.
https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html

[stnolting]

I've never tried them either, but it's worth a try!