inserting FIR at receiver before running spectrum analyzer

[arittenbach]

Hi,

I recently purchased the RFSoC4x2 and am getting myself familiar with it. One thing I am interested in doing is applying an FIR filter in hardware. I have the Xilinx FIR Compiler IP core, and have been trying to filter data after generating the rfsoc_sam block diagram. Right now, I have the FIR filter inserted in between the xsg_bandwidth_selector and the spectrum analyzer block. For each spectrum analyzer, I have two FIRS (one for filtering real data, the other for complex).

One question I have- does the spectrum analyzer expect 16 bit or 32 bit precision for the real and imaginary signals as input. I saw that the port has a 128 bit bus, but I wasn't sure about whether I should configure my FIR to full precision or round to 16.

Any info or documentation you could send a pointer to would be great!

Thanks in advance.