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AMDGPU: Fix using wrong alloca address space in test (llvm#102108)
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4 files changed

+36
-30
lines changed

4 files changed

+36
-30
lines changed

‎llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -451,15 +451,15 @@ define i32 @malloc_in_loop(i32 %arg) {
451451
; CHECK-LABEL: define {{[^@]+}}@malloc_in_loop
452452
; CHECK-SAME: (i32 [[ARG:%.*]]) {
453453
; CHECK-NEXT: bb:
454-
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
455-
; CHECK-NEXT: [[I1:%.*]] = alloca ptr, align 8
456-
; CHECK-NEXT: [[I11:%.*]] = alloca i8, i32 0, align 8
457-
; CHECK-NEXT: store i32 [[ARG]], ptr [[I]], align 4
454+
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4, addrspace(5)
455+
; CHECK-NEXT: [[I1:%.*]] = alloca ptr, align 8, addrspace(5)
456+
; CHECK-NEXT: [[I11:%.*]] = alloca i8, i32 0, align 8, addrspace(5)
457+
; CHECK-NEXT: store i32 [[ARG]], ptr addrspace(5) [[I]], align 4
458458
; CHECK-NEXT: br label [[BB2:%.*]]
459459
; CHECK: bb2:
460-
; CHECK-NEXT: [[I3:%.*]] = load i32, ptr [[I]], align 4
460+
; CHECK-NEXT: [[I3:%.*]] = load i32, ptr addrspace(5) [[I]], align 4
461461
; CHECK-NEXT: [[I4:%.*]] = add nsw i32 [[I3]], -1
462-
; CHECK-NEXT: store i32 [[I4]], ptr [[I]], align 4
462+
; CHECK-NEXT: store i32 [[I4]], ptr addrspace(5) [[I]], align 4
463463
; CHECK-NEXT: [[I5:%.*]] = icmp sgt i32 [[I4]], 0
464464
; CHECK-NEXT: br i1 [[I5]], label [[BB6:%.*]], label [[BB9:%.*]]
465465
; CHECK: bb6:
@@ -469,15 +469,15 @@ define i32 @malloc_in_loop(i32 %arg) {
469469
; CHECK-NEXT: ret i32 5
470470
;
471471
bb:
472-
%i = alloca i32, align 4
473-
%i1 = alloca ptr, align 8
474-
store i32 %arg, ptr %i, align 4
472+
%i = alloca i32, align 4, addrspace(5)
473+
%i1 = alloca ptr, align 8, addrspace(5)
474+
store i32 %arg, ptr addrspace(5) %i, align 4
475475
br label %bb2
476476

477477
bb2:
478-
%i3 = load i32, ptr %i, align 4
478+
%i3 = load i32, ptr addrspace(5) %i, align 4
479479
%i4 = add nsw i32 %i3, -1
480-
store i32 %i4, ptr %i, align 4
480+
store i32 %i4, ptr addrspace(5) %i, align 4
481481
%i5 = icmp sgt i32 %i4, 0
482482
br i1 %i5, label %bb6, label %bb9
483483

‎llvm/test/Transforms/Attributor/value-simplify-gpu.ll‎

Lines changed: 17 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -205,8 +205,9 @@ define internal void @level1(i32 %C) {
205205
; TUNIT-LABEL: define {{[^@]+}}@level1
206206
; TUNIT-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
207207
; TUNIT-NEXT: entry:
208-
; TUNIT-NEXT: [[LOCAL:%.*]] = alloca i32, align 4
209-
; TUNIT-NEXT: call void @level2all_early(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
208+
; TUNIT-NEXT: [[LOCAL_ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
209+
; TUNIT-NEXT: [[LOCAL:%.*]] = addrspacecast ptr addrspace(5) [[LOCAL_ALLOCA]] to ptr
210+
; TUNIT-NEXT: call void @level2all_early(ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
210211
; TUNIT-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0
211212
; TUNIT-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
212213
; TUNIT: if.then:
@@ -216,29 +217,31 @@ define internal void @level1(i32 %C) {
216217
; TUNIT-NEXT: call void @level2b() #[[ATTR5]]
217218
; TUNIT-NEXT: br label [[IF_END]]
218219
; TUNIT: if.end:
219-
; TUNIT-NEXT: call void @level2all_late(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR6]]
220+
; TUNIT-NEXT: call void @level2all_late(ptr nocapture nofree noundef writeonly align 4 dereferenceable_or_null(4) [[LOCAL]]) #[[ATTR6]]
220221
; TUNIT-NEXT: ret void
221222
;
222223
; CGSCC: Function Attrs: norecurse nosync nounwind
223224
; CGSCC-LABEL: define {{[^@]+}}@level1
224225
; CGSCC-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
225226
; CGSCC-NEXT: entry:
226-
; CGSCC-NEXT: [[LOCAL:%.*]] = alloca i32, align 4
227-
; CGSCC-NEXT: call void @level2all_early(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR5]]
227+
; CGSCC-NEXT: [[LOCAL_ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
228+
; CGSCC-NEXT: [[LOCAL:%.*]] = addrspacecast ptr addrspace(5) [[LOCAL_ALLOCA]] to ptr
229+
; CGSCC-NEXT: call void @level2all_early(ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR5]]
228230
; CGSCC-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0
229231
; CGSCC-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
230232
; CGSCC: if.then:
231-
; CGSCC-NEXT: call void @level2a(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
233+
; CGSCC-NEXT: call void @level2a(ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
232234
; CGSCC-NEXT: br label [[IF_END:%.*]]
233235
; CGSCC: if.else:
234-
; CGSCC-NEXT: call void @level2b(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
236+
; CGSCC-NEXT: call void @level2b(ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
235237
; CGSCC-NEXT: br label [[IF_END]]
236238
; CGSCC: if.end:
237-
; CGSCC-NEXT: call void @level2all_late(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR6]]
239+
; CGSCC-NEXT: call void @level2all_late(ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR6]]
238240
; CGSCC-NEXT: ret void
239241
;
240242
entry:
241-
%local = alloca i32
243+
%local.alloca = alloca i32, addrspace(5)
244+
%local = addrspacecast ptr addrspace(5) %local.alloca to ptr
242245
call void @level2all_early(ptr %local)
243246
%tobool = icmp ne i32 %C, 0
244247
br i1 %tobool, label %if.then, label %if.else
@@ -259,9 +262,10 @@ if.end: ; preds = %if.else, %if.then
259262
define internal void @level2all_early(ptr %addr) {
260263
; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
261264
; TUNIT-LABEL: define {{[^@]+}}@level2all_early
262-
; TUNIT-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
265+
; TUNIT-SAME: (ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
263266
; TUNIT-NEXT: entry:
264267
; TUNIT-NEXT: store i32 1, ptr addrspace(3) @ReachableNonKernel, align 4
268+
; TUNIT-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
265269
; TUNIT-NEXT: ret void
266270
;
267271
; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
@@ -337,14 +341,15 @@ entry:
337341
define internal void @level2all_late(ptr %addr) {
338342
; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
339343
; TUNIT-LABEL: define {{[^@]+}}@level2all_late
340-
; TUNIT-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
344+
; TUNIT-SAME: (ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
341345
; TUNIT-NEXT: entry:
342346
; TUNIT-NEXT: store i32 1, ptr addrspace(3) @UnreachableNonKernel, align 4
347+
; TUNIT-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
343348
; TUNIT-NEXT: ret void
344349
;
345350
; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
346351
; CGSCC-LABEL: define {{[^@]+}}@level2all_late
347-
; CGSCC-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
352+
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
348353
; CGSCC-NEXT: entry:
349354
; CGSCC-NEXT: store i32 1, ptr addrspace(3) @UnreachableNonKernel, align 4
350355
; CGSCC-NEXT: store i32 5, ptr [[ADDR]], align 4

‎llvm/test/Transforms/OpenMP/barrier_removal.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -332,28 +332,28 @@ define void @pos_priv_mem() "kernel" {
332332
; CHECK-LABEL: define {{[^@]+}}@pos_priv_mem
333333
; CHECK-SAME: () #[[ATTR4]] {
334334
; CHECK-NEXT: [[ARG:%.*]] = load ptr addrspace(5), ptr @GPtr5, align 4
335-
; CHECK-NEXT: [[LOC:%.*]] = alloca i32, align 4
335+
; CHECK-NEXT: [[LOC:%.*]] = alloca i32, align 4, addrspace(5)
336336
; CHECK-NEXT: [[A:%.*]] = load i32, ptr @PG1, align 4
337-
; CHECK-NEXT: store i32 [[A]], ptr [[LOC]], align 4
337+
; CHECK-NEXT: store i32 [[A]], ptr addrspace(5) [[LOC]], align 4
338338
; CHECK-NEXT: [[B:%.*]] = load i32, ptr addrspacecast (ptr addrspace(5) @PG2 to ptr), align 4
339339
; CHECK-NEXT: [[ARGC:%.*]] = addrspacecast ptr addrspace(5) [[ARG]] to ptr
340340
; CHECK-NEXT: store i32 [[B]], ptr [[ARGC]], align 4
341-
; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[LOC]], align 4
341+
; CHECK-NEXT: [[V:%.*]] = load i32, ptr addrspace(5) [[LOC]], align 4
342342
; CHECK-NEXT: store i32 [[V]], ptr @PG1, align 4
343343
; CHECK-NEXT: ret void
344344
;
345345
%arg = load ptr addrspace(5), ptr @GPtr5
346-
%loc = alloca i32
346+
%loc = alloca i32, addrspace(5)
347347
%a = load i32, ptr @PG1
348348
call void @aligned_barrier()
349-
store i32 %a, ptr %loc
349+
store i32 %a, ptr addrspace(5) %loc
350350
%PG2c = addrspacecast ptr addrspace(5) @PG2 to ptr
351351
%b = load i32, ptr %PG2c
352352
call void @aligned_barrier()
353353
%argc = addrspacecast ptr addrspace(5) %arg to ptr
354354
store i32 %b, ptr %argc
355355
call void @aligned_barrier()
356-
%v = load i32, ptr %loc
356+
%v = load i32, ptr addrspace(5) %loc
357357
store i32 %v, ptr @PG1
358358
call void @aligned_barrier()
359359
ret void

‎llvm/test/Transforms/PhaseOrdering/varargs.ll‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,8 @@ entry:
2020

2121
define internal i32 @vararg(i32 %first, ...) {
2222
entry:
23-
%vlist = alloca ptr, align 8
23+
%vlist.alloca = alloca ptr, align 8, addrspace(5)
24+
%vlist = addrspacecast ptr addrspace(5) %vlist.alloca to ptr
2425
call void @llvm.va_start.p0(ptr %vlist)
2526
%vlist.promoted = load ptr, ptr %vlist, align 8
2627
%argp.a = getelementptr inbounds i8, ptr %vlist.promoted, i64 4

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