fix(csr): misa: add Q-bit in sw_read() (riscv-software-src#922)

Added bit 16 (Q-bit) to `sw_read()` for `misa` CSR according to Table 10
in Section 3.1.1. of The RISC-V Instruction Set Manual Volume II version
20250508.

Author: adingank-qualcomm

spec/std/isa/csr/misa.yaml

@@ -236,6 +236,7 @@ sw_read(): |
     (CSR[misa].V << 21) |
     (CSR[misa].U << 20) |
     (CSR[misa].S << 18) |
+    (CSR[misa].Q << 16) |
     (CSR[misa].M << 12) |
     (CSR[misa].I << 7) |
     (CSR[misa].H << 6) |