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Merge commit '0e17fb52da13' from llvm.org/main into next
2 parents cc22a0a + 0e17fb5 commit 11d006a

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+32
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+32
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clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -133,8 +133,7 @@ class AggExprEmitter : public StmtVisitor<AggExprEmitter> {
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}
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void VisitParenExpr(ParenExpr *pe) { Visit(pe->getSubExpr()); }
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void VisitGenericSelectionExpr(GenericSelectionExpr *ge) {
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cgf.cgm.errorNYI(ge->getSourceRange(),
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"AggExprEmitter: VisitGenericSelectionExpr");
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Visit(ge->getResultExpr());
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}
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void VisitCoawaitExpr(CoawaitExpr *e) {
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cgf.cgm.errorNYI(e->getSourceRange(), "AggExprEmitter: VisitCoawaitExpr");

clang/lib/CIR/CodeGen/CIRGenFunction.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -836,6 +836,8 @@ LValue CIRGenFunction::emitLValue(const Expr *e) {
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return emitCallExprLValue(cast<CallExpr>(e));
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case Expr::ParenExprClass:
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return emitLValue(cast<ParenExpr>(e)->getSubExpr());
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case Expr::GenericSelectionExprClass:
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return emitLValue(cast<GenericSelectionExpr>(e)->getResultExpr());
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case Expr::DeclRefExprClass:
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return emitDeclRefLValue(cast<DeclRefExpr>(e));
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case Expr::CStyleCastExprClass:

clang/test/CIR/CodeGen/struct.cpp

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -154,3 +154,32 @@ void choose_expr() {
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// OGCG: %[[B_ADDR:.*]] = alloca %struct.CompleteS, align 4
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// OGCG: %[[C_ADDR:.*]] = alloca %struct.CompleteS, align 4
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// OGCG: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[C_ADDR]], ptr align 4 %[[A_ADDR]], i64 8, i1 false)
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void generic_selection() {
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CompleteS a;
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CompleteS b;
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int c;
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CompleteS d = _Generic(c, int : a, default: b);
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}
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// CIR: cir.func{{.*}} @_Z17generic_selectionv()
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// CIR: %[[A_ADDR:.*]] = cir.alloca !rec_CompleteS, !cir.ptr<!rec_CompleteS>, ["a"]
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// CIR: %[[B_ADDR:.*]] = cir.alloca !rec_CompleteS, !cir.ptr<!rec_CompleteS>, ["b"]
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// CIR: %[[C_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["c"]
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// CIR: %[[D_ADDR:.*]] = cir.alloca !rec_CompleteS, !cir.ptr<!rec_CompleteS>, ["d", init]
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// TODO(cir): Call to default copy constructor should be replaced by `cir.copy` op
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// CIR: cir.call @_ZN9CompleteSC1ERKS_(%[[D_ADDR]], %[[A_ADDR]]) nothrow : (!cir.ptr<!rec_CompleteS>, !cir.ptr<!rec_CompleteS>) -> ()
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// LLVM: define{{.*}} void @_Z17generic_selectionv()
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// LLVM: %1 = alloca %struct.CompleteS, i64 1, align 4
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// LLVM: %2 = alloca %struct.CompleteS, i64 1, align 4
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// LLVM: %3 = alloca i32, i64 1, align 4
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// LLVM: %4 = alloca %struct.CompleteS, i64 1, align 4
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// LLVM: call void @_ZN9CompleteSC1ERKS_(ptr %4, ptr %1)
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// OGCG: define{{.*}} void @_Z17generic_selectionv()
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// OGCG: %[[A_ADDR:.*]] = alloca %struct.CompleteS, align 4
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// OGCG: %[[B_ADDR:.*]] = alloca %struct.CompleteS, align 4
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// OGCG: %[[C_ADDR:.*]] = alloca i32, align 4
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// OGCG: %[[D_ADDR:.*]] = alloca %struct.CompleteS, align 4
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// OGCG: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %[[D_ADDR]], ptr align 4 %[[A_ADDR]], i64 8, i1 false)

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