[IR] Don't DCE llvm.ret.popless.

We originally had the intrinsic forward its return value to the ret to
have musttail-like behavior, which ensured it was always preserved.
Now that the intrinsic call is musttail but doesn't have any forwarded
operands, it needs to be kept alive through other means.

It might make sense to mark it as having side effects, and not
duplicable, but that shouldn't be necessary, and it's as duplicable
as any musttail call+ret sequence would be.

Because of this, we can't rely on it being DCE'd in ISel either, so drop
it explicitly in IRTranslator for GISel.  We already had to do it in
SDISel anyway.  While there, explicitly reject it in FastISel.

rdar://147236255

Author: ahmedbougacha

llvm/include/llvm/IR/Intrinsics.td

@@ -850,7 +850,7 @@ def int_localrecover : DefaultAttrsIntrinsic<[llvm_ptr_ty],
 //
 // Calls to this intrinsic need to be musttail, but don't follow the other ABI
 // requirements for musttail calls, since this is really annotating the ret.
-def int_ret_popless : DefaultAttrsIntrinsic<[], [], [IntrNoMem]>;
+def int_ret_popless : DefaultAttrsIntrinsic<[], [], [IntrInaccessibleMemOnly]>;
 
 // Given the frame pointer passed into an SEH filter function, returns a
 // pointer to the local variable area suitable for use with llvm.localrecover.

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

@@ -2393,6 +2393,13 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
                           {getOrCreateVReg(*CI.getArgOperand(0))});
     return true;
   }
+  case Intrinsic::ret_popless: {
+    // The ret.popless intrin call itself is only annotating the following ret.
+    // To achieve that, it does need to be musttail and reachable from the ret.
+    assert(CI.getParent()->getTerminatingMustTailCall() == &CI &&
+           "llvm.ret.popless not in musttail position");
+    return true;
+  }
   case Intrinsic::cttz:
   case Intrinsic::ctlz: {
     ConstantInt *Cst = cast<ConstantInt>(CI.getArgOperand(1));

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -7958,7 +7958,10 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
   }
 
   case Intrinsic::ret_popless:
-    // We're handling this on the associated ret itself.
+    // The ret.popless intrin call itself is only annotating the following ret.
+    // To achieve that, it does need to be musttail and reachable from the ret.
+    assert(I.getParent()->getTerminatingMustTailCall() == &I &&
+           "llvm.ret.popless not in musttail position");
     return;
 
   case Intrinsic::threadlocal_address: {

llvm/lib/Target/AArch64/AArch64FastISel.cpp

@@ -3867,6 +3867,9 @@ bool AArch64FastISel::selectRet(const Instruction *I) {
   if (TLI.supportSplitCSR(FuncInfo.MF))
     return false;
 
+  if (I->getParent()->getTerminatingMustTailCall())
+    return false;
+
   // Build a list of return value registers.
   SmallVector<unsigned, 4> RetRegs;
 

llvm/test/CodeGen/AArch64/swiftcorocc-ret-popless.ll

@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc -verify-machineinstrs -mtriple arm64e-apple-darwin -o - %s | FileCheck %s --check-prefixes=CHECK,SDISEL
-; RUN: llc -verify-machineinstrs -mtriple arm64e-apple-darwin -global-isel -global-isel-abort=2 -o - %s | FileCheck %s --check-prefixes=CHECK,GISEL
+; RUN: llc -verify-machineinstrs -mtriple arm64e-apple-darwin -global-isel -global-isel-abort=1 -o - %s | FileCheck %s --check-prefixes=CHECK,GISEL
 
 declare i64 @g(ptr, ptr)
 

llvm/test/Transforms/DCE/int_ret_popless.ll

@@ -0,0 +1,11 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S < %s -passes=dce  | FileCheck %s
+
+define void @test_ret_popless() {
+; CHECK-LABEL: define void @test_ret_popless() {
+; CHECK-NEXT:    musttail call void @llvm.ret.popless()
+; CHECK-NEXT:    ret void
+;
+  musttail call void @llvm.ret.popless()
+  ret void
+}