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eayuseayus
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Allow vector zero padding intrinsics to be used in constexpr (llvm#156441)
Fix llvm#156346 by marking intrinsics as constexpr. A test has been added for each intrinsic. The following instrinsics have been modified: ``` _mm256_zextpd128_pd256 _mm512_zextpd128_pd512 _mm512_zextpd256_pd512 _mm256_zextph128_ph256 _mm512_zextph128_ph512 _mm512_zextph256_ph512 _mm256_zextps128_ps256 _mm512_zextps128_ps512 _mm512_zextps256_ps512 _mm256_zextsi128_si256 _mm512_zextsi128_si512 _mm512_zextsi256_si512 ```
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6 files changed

+33
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‎clang/lib/Headers/avx512fintrin.h‎

Lines changed: 12 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -536,9 +536,8 @@ _mm512_mask2int(__mmask16 __a)
536536
/// A 128-bit vector of [2 x double].
537537
/// \returns A 512-bit floating-point vector of [8 x double]. The lower 128 bits
538538
/// contain the value of the parameter. The upper 384 bits are set to zero.
539-
static __inline __m512d __DEFAULT_FN_ATTRS512
540-
_mm512_zextpd128_pd512(__m128d __a)
541-
{
539+
static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
540+
_mm512_zextpd128_pd512(__m128d __a) {
542541
return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3, 2, 3, 2, 3);
543542
}
544543

@@ -555,9 +554,8 @@ _mm512_zextpd128_pd512(__m128d __a)
555554
/// A 256-bit vector of [4 x double].
556555
/// \returns A 512-bit floating-point vector of [8 x double]. The lower 256 bits
557556
/// contain the value of the parameter. The upper 256 bits are set to zero.
558-
static __inline __m512d __DEFAULT_FN_ATTRS512
559-
_mm512_zextpd256_pd512(__m256d __a)
560-
{
557+
static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
558+
_mm512_zextpd256_pd512(__m256d __a) {
561559
return __builtin_shufflevector((__v4df)__a, (__v4df)_mm256_setzero_pd(), 0, 1, 2, 3, 4, 5, 6, 7);
562560
}
563561

@@ -573,9 +571,8 @@ _mm512_zextpd256_pd512(__m256d __a)
573571
/// A 128-bit vector of [4 x float].
574572
/// \returns A 512-bit floating-point vector of [16 x float]. The lower 128 bits
575573
/// contain the value of the parameter. The upper 384 bits are set to zero.
576-
static __inline __m512 __DEFAULT_FN_ATTRS512
577-
_mm512_zextps128_ps512(__m128 __a)
578-
{
574+
static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
575+
_mm512_zextps128_ps512(__m128 __a) {
579576
return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 4, 5, 6, 7, 4, 5, 6, 7);
580577
}
581578

@@ -591,9 +588,8 @@ _mm512_zextps128_ps512(__m128 __a)
591588
/// A 256-bit vector of [8 x float].
592589
/// \returns A 512-bit floating-point vector of [16 x float]. The lower 256 bits
593590
/// contain the value of the parameter. The upper 256 bits are set to zero.
594-
static __inline __m512 __DEFAULT_FN_ATTRS512
595-
_mm512_zextps256_ps512(__m256 __a)
596-
{
591+
static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
592+
_mm512_zextps256_ps512(__m256 __a) {
597593
return __builtin_shufflevector((__v8sf)__a, (__v8sf)_mm256_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
598594
}
599595

@@ -609,9 +605,8 @@ _mm512_zextps256_ps512(__m256 __a)
609605
/// A 128-bit integer vector.
610606
/// \returns A 512-bit integer vector. The lower 128 bits contain the value of
611607
/// the parameter. The upper 384 bits are set to zero.
612-
static __inline __m512i __DEFAULT_FN_ATTRS512
613-
_mm512_zextsi128_si512(__m128i __a)
614-
{
608+
static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
609+
_mm512_zextsi128_si512(__m128i __a) {
615610
return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3, 2, 3, 2, 3);
616611
}
617612

@@ -627,9 +622,8 @@ _mm512_zextsi128_si512(__m128i __a)
627622
/// A 256-bit integer vector.
628623
/// \returns A 512-bit integer vector. The lower 256 bits contain the value of
629624
/// the parameter. The upper 256 bits are set to zero.
630-
static __inline __m512i __DEFAULT_FN_ATTRS512
631-
_mm512_zextsi256_si512(__m256i __a)
632-
{
625+
static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
626+
_mm512_zextsi256_si512(__m256i __a) {
633627
return __builtin_shufflevector((__v4di)__a, (__v4di)_mm256_setzero_si256(), 0, 1, 2, 3, 4, 5, 6, 7);
634628
}
635629

‎clang/lib/Headers/avx512fp16intrin.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -242,7 +242,7 @@ _mm512_castph256_ph512(__m256h __a) {
242242
/// A 128-bit vector of [8 x half].
243243
/// \returns A 512-bit floating-point vector of [16 x half]. The lower 128 bits
244244
/// contain the value of the parameter. The upper 384 bits are set to zero.
245-
static __inline__ __m256h __DEFAULT_FN_ATTRS256
245+
static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
246246
_mm256_zextph128_ph256(__m128h __a) {
247247
return __builtin_shufflevector(__a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4,
248248
5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
@@ -261,7 +261,7 @@ _mm256_zextph128_ph256(__m128h __a) {
261261
/// A 128-bit vector of [8 x half].
262262
/// \returns A 512-bit floating-point vector of [32 x half]. The lower 128 bits
263263
/// contain the value of the parameter. The upper 384 bits are set to zero.
264-
static __inline__ __m512h __DEFAULT_FN_ATTRS512
264+
static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
265265
_mm512_zextph128_ph512(__m128h __a) {
266266
return __builtin_shufflevector(
267267
__a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
@@ -281,7 +281,7 @@ _mm512_zextph128_ph512(__m128h __a) {
281281
/// A 256-bit vector of [16 x half].
282282
/// \returns A 512-bit floating-point vector of [32 x half]. The lower 256 bits
283283
/// contain the value of the parameter. The upper 256 bits are set to zero.
284-
static __inline__ __m512h __DEFAULT_FN_ATTRS512
284+
static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
285285
_mm512_zextph256_ph512(__m256h __a) {
286286
return __builtin_shufflevector(__a, (__v16hf)_mm256_setzero_ph(), 0, 1, 2, 3,
287287
4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,

‎clang/lib/Headers/avxintrin.h‎

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -4583,9 +4583,8 @@ _mm256_castsi128_si256(__m128i __a)
45834583
/// A 128-bit vector of [2 x double].
45844584
/// \returns A 256-bit floating-point vector of [4 x double]. The lower 128 bits
45854585
/// contain the value of the parameter. The upper 128 bits are set to zero.
4586-
static __inline __m256d __DEFAULT_FN_ATTRS
4587-
_mm256_zextpd128_pd256(__m128d __a)
4588-
{
4586+
static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
4587+
_mm256_zextpd128_pd256(__m128d __a) {
45894588
return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3);
45904589
}
45914590

@@ -4601,9 +4600,8 @@ _mm256_zextpd128_pd256(__m128d __a)
46014600
/// A 128-bit vector of [4 x float].
46024601
/// \returns A 256-bit floating-point vector of [8 x float]. The lower 128 bits
46034602
/// contain the value of the parameter. The upper 128 bits are set to zero.
4604-
static __inline __m256 __DEFAULT_FN_ATTRS
4605-
_mm256_zextps128_ps256(__m128 __a)
4606-
{
4603+
static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
4604+
_mm256_zextps128_ps256(__m128 __a) {
46074605
return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7);
46084606
}
46094607

@@ -4619,9 +4617,8 @@ _mm256_zextps128_ps256(__m128 __a)
46194617
/// A 128-bit integer vector.
46204618
/// \returns A 256-bit integer vector. The lower 128 bits contain the value of
46214619
/// the parameter. The upper 128 bits are set to zero.
4622-
static __inline __m256i __DEFAULT_FN_ATTRS
4623-
_mm256_zextsi128_si256(__m128i __a)
4624-
{
4620+
static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4621+
_mm256_zextsi128_si256(__m128i __a) {
46254622
return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3);
46264623
}
46274624

‎clang/test/CodeGen/X86/avx-builtins.c‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2151,17 +2151,20 @@ __m256d test_mm256_zextpd128_pd256(__m128d A) {
21512151
// CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
21522152
return _mm256_zextpd128_pd256(A);
21532153
}
2154+
TEST_CONSTEXPR(match_m256d(_mm256_zextpd128_pd256((__m128d){-4.0, -5.0}), -4.0, -5.0, +0.0, +0.0));
21542155

21552156
__m256 test_mm256_zextps128_ps256(__m128 A) {
21562157
// CHECK-LABEL: test_mm256_zextps128_ps256
21572158
// CHECK: store <4 x float> zeroinitializer
21582159
// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
21592160
return _mm256_zextps128_ps256(A);
21602161
}
2162+
TEST_CONSTEXPR(match_m256(_mm256_zextps128_ps256((__m128){1.0f, 2.0f, 3.0f, 4.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 0.0f, 0.0f, 0.0f, 0.0f));
21612163

21622164
__m256i test_mm256_zextsi128_si256(__m128i A) {
21632165
// CHECK-LABEL: test_mm256_zextsi128_si256
21642166
// CHECK: store <2 x i64> zeroinitializer
21652167
// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
21662168
return _mm256_zextsi128_si256(A);
21672169
}
2170+
TEST_CONSTEXPR(match_m256i(_mm256_zextsi128_si256((__m128i){1, 2}), 1, 2, 0, 0));

‎clang/test/CodeGen/X86/avx512f-builtins.c‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11038,41 +11038,47 @@ __m512d test_mm512_zextpd128_pd512(__m128d A) {
1103811038
// CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>
1103911039
return _mm512_zextpd128_pd512(A);
1104011040
}
11041+
TEST_CONSTEXPR(match_m512d(_mm512_zextpd128_pd512((__m128d){+99.0, -1.0}), +99.0, -1.0, +0.0, +0.0, 0.0, 0.0, 0.0, 0.0));
1104111042

1104211043
__m512d test_mm512_zextpd256_pd512(__m256d A) {
1104311044
// CHECK-LABEL: test_mm512_zextpd256_pd512
1104411045
// CHECK: store <4 x double> zeroinitializer
1104511046
// CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1104611047
return _mm512_zextpd256_pd512(A);
1104711048
}
11049+
TEST_CONSTEXPR(match_m512d(_mm512_zextpd256_pd512((__m256d){1.0, 2.0, 3.0, 4.0}), 1.0, 2.0, 3.0, 4.0, 0.0, 0.0, 0.0, 0.0));
1104811050

1104911051
__m512 test_mm512_zextps128_ps512(__m128 A) {
1105011052
// CHECK-LABEL: test_mm512_zextps128_ps512
1105111053
// CHECK: store <4 x float> zeroinitializer
1105211054
// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
1105311055
return _mm512_zextps128_ps512(A);
1105411056
}
11057+
TEST_CONSTEXPR(match_m512(_mm512_zextps128_ps512((__m128){1.0f, 2.0f, 3.0f, 4.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f));
1105511058

1105611059
__m512 test_mm512_zextps256_ps512(__m256 A) {
1105711060
// CHECK-LABEL: test_mm512_zextps256_ps512
1105811061
// CHECK: store <8 x float> zeroinitializer
1105911062
// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
1106011063
return _mm512_zextps256_ps512(A);
1106111064
}
11065+
TEST_CONSTEXPR(match_m512(_mm512_zextps256_ps512((__m256){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f));
1106211066

1106311067
__m512i test_mm512_zextsi128_si512(__m128i A) {
1106411068
// CHECK-LABEL: test_mm512_zextsi128_si512
1106511069
// CHECK: store <2 x i64> zeroinitializer
1106611070
// CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>
1106711071
return _mm512_zextsi128_si512(A);
1106811072
}
11073+
TEST_CONSTEXPR(match_m512i(_mm512_zextsi128_si512((__m128i){1, 2}), 1, 2, 0, 0, 0, 0, 0, 0));
1106911074

1107011075
__m512i test_mm512_zextsi256_si512(__m256i A) {
1107111076
// CHECK-LABEL: test_mm512_zextsi256_si512
1107211077
// CHECK: store <4 x i64> zeroinitializer
1107311078
// CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1107411079
return _mm512_zextsi256_si512(A);
1107511080
}
11081+
TEST_CONSTEXPR(match_m512i(_mm512_zextsi256_si512((__m256i){1, 2, 3, 4}), 1, 2, 3, 4, 0, 0, 0, 0));
1107611082

1107711083
__m512d test_mm512_i32logather_pd(__m512i __index, void const *__addr) {
1107811084
// CHECK-LABEL: test_mm512_i32logather_pd

‎clang/test/CodeGen/X86/avx512fp16-builtins.c‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -382,18 +382,21 @@ __m256h test_mm256_zextph128_ph256(__m128h __a) {
382382
// CHECK: shufflevector <8 x half> %{{.*}}, <8 x half> {{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
383383
return _mm256_zextph128_ph256(__a);
384384
}
385+
TEST_CONSTEXPR(match_m256h(_mm256_zextph128_ph256((__m128h){1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16}), 1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16));
385386

386387
__m512h test_mm512_zextph128_ph512(__m128h __a) {
387388
// CHECK-LABEL: test_mm512_zextph128_ph512
388389
// CHECK: shufflevector <8 x half> %{{.*}}, <8 x half> {{.*}}, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
389390
return _mm512_zextph128_ph512(__a);
390391
}
392+
TEST_CONSTEXPR(match_m512h(_mm512_zextph128_ph512((__m128h){1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16}), 1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16));
391393

392394
__m512h test_mm512_zextph256_ph512(__m256h __a) {
393395
// CHECK-LABEL: test_mm512_zextph256_ph512
394396
// CHECK: shufflevector <16 x half> %{{.*}}, <16 x half> {{.*}}, <32 x i32>
395397
return _mm512_zextph256_ph512(__a);
396398
}
399+
TEST_CONSTEXPR(match_m512h(_mm512_zextph256_ph512((__m256h){1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 9.0f16, 10.0f16, 11.0f16, 12.0f16, 13.0f16, 14.0f16, 15.0f16, 16.0f16}), 1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 9.0f16, 10.0f16, 11.0f16, 12.0f16, 13.0f16, 14.0f16, 15.0f16, 16.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16));
397400

398401
int test_mm_comi_round_sh(__m128h __A, __m128h __B) {
399402
// CHECK-LABEL: test_mm_comi_round_sh

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