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2 parents 39ad6a4 + 8c1207b commit 5403ae4Copy full SHA for 5403ae4
llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
@@ -176,8 +176,9 @@ struct ModuleAnalysisInfo {
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RegisterAliasTable[MF][Reg] = AliasReg;
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}
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Register getRegisterAlias(const MachineFunction *MF, Register Reg) {
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- auto RI = RegisterAliasTable[MF].find(Reg);
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- if (RI == RegisterAliasTable[MF].end()) {
+ auto &RegTable = RegisterAliasTable[MF];
+ auto RI = RegTable.find(Reg);
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+ if (RI == RegTable.end()) {
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return Register(0);
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return RI->second;
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