Skip to content

Commit 72fd879

Browse files
author
git apple-llvm automerger
committed
Merge commit '406d9b1dd652' from llvm.org/main into next
2 parents f251199 + 406d9b1 commit 72fd879

25 files changed

+101
-161
lines changed

‎llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h

Lines changed: 7 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -50,14 +50,12 @@ class LLVM_ABI CallLowering {
5050
struct BaseArgInfo {
5151
Type *Ty;
5252
SmallVector<ISD::ArgFlagsTy, 4> Flags;
53-
bool IsFixed;
5453

5554
BaseArgInfo(Type *Ty,
56-
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
57-
bool IsFixed = true)
58-
: Ty(Ty), Flags(Flags), IsFixed(IsFixed) {}
55+
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>())
56+
: Ty(Ty), Flags(Flags) {}
5957

60-
BaseArgInfo() : Ty(nullptr), IsFixed(false) {}
58+
BaseArgInfo() : Ty(nullptr) {}
6159
};
6260

6361
struct ArgInfo : public BaseArgInfo {
@@ -81,8 +79,8 @@ class LLVM_ABI CallLowering {
8179

8280
ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex,
8381
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
84-
bool IsFixed = true, const Value *OrigValue = nullptr)
85-
: BaseArgInfo(Ty, Flags, IsFixed), Regs(Regs), OrigValue(OrigValue),
82+
const Value *OrigValue = nullptr)
83+
: BaseArgInfo(Ty, Flags), Regs(Regs), OrigValue(OrigValue),
8684
OrigArgIndex(OrigIndex) {
8785
if (!Regs.empty() && Flags.empty())
8886
this->Flags.push_back(ISD::ArgFlagsTy());
@@ -93,9 +91,8 @@ class LLVM_ABI CallLowering {
9391
}
9492

9593
ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex,
96-
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
97-
bool IsFixed = true)
98-
: ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {}
94+
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>())
95+
: ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, &OrigValue) {}
9996

10097
ArgInfo() = default;
10198
};

‎llvm/include/llvm/CodeGen/TargetCallingConv.h

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,8 @@ namespace ISD {
5555
unsigned IsInConsecutiveRegs : 1;
5656
unsigned IsCopyElisionCandidate : 1; ///< Argument copy elision candidate
5757
unsigned IsPointer : 1;
58+
/// Whether this is part of a variable argument list (non-fixed).
59+
unsigned IsVarArg : 1;
5860

5961
unsigned ByValOrByRefSize = 0; ///< Byval or byref struct size
6062

@@ -69,7 +71,7 @@ namespace ISD {
6971
IsSwiftError(0), IsCFGuardTarget(0), IsHva(0), IsHvaStart(0),
7072
IsSecArgPass(0), MemAlign(0), OrigAlign(0),
7173
IsInConsecutiveRegsLast(0), IsInConsecutiveRegs(0),
72-
IsCopyElisionCandidate(0), IsPointer(0) {
74+
IsCopyElisionCandidate(0), IsPointer(0), IsVarArg(0) {
7375
static_assert(sizeof(*this) == 4 * sizeof(unsigned), "flags are too big");
7476
}
7577

@@ -150,6 +152,9 @@ namespace ISD {
150152
bool isPointer() const { return IsPointer; }
151153
void setPointer() { IsPointer = 1; }
152154

155+
bool isVarArg() const { return IsVarArg; }
156+
void setVarArg() { IsVarArg = 1; }
157+
153158
Align getNonZeroMemAlign() const {
154159
return decodeMaybeAlign(MemAlign).valueOrOne();
155160
}
@@ -244,9 +249,6 @@ namespace ISD {
244249
MVT VT;
245250
EVT ArgVT;
246251

247-
/// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
248-
bool IsFixed = false;
249-
250252
/// Index original Function's argument.
251253
unsigned OrigArgIndex;
252254

@@ -256,10 +258,9 @@ namespace ISD {
256258
unsigned PartOffset;
257259

258260
OutputArg() = default;
259-
OutputArg(ArgFlagsTy flags, MVT vt, EVT argvt, bool isfixed,
260-
unsigned origIdx, unsigned partOffs)
261-
: Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
262-
PartOffset(partOffs) {
261+
OutputArg(ArgFlagsTy flags, MVT vt, EVT argvt, unsigned origIdx,
262+
unsigned partOffs)
263+
: Flags(flags), OrigArgIndex(origIdx), PartOffset(partOffs) {
263264
VT = vt;
264265
ArgVT = argvt;
265266
}

‎llvm/include/llvm/Target/TargetCallingConv.td

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,12 @@ class CCIfVarArg<CCAction A> : CCIf<"State.isVarArg()", A> {}
102102
/// CCIfNotVarArg - If the current function is not vararg - apply the action
103103
class CCIfNotVarArg<CCAction A> : CCIf<"!State.isVarArg()", A> {}
104104

105+
/// Apply the action if argument is fixed (not vararg).
106+
class CCIfArgFixed<CCAction A> : CCIf<"!ArgFlags.isVarArg()", A>;
107+
108+
/// Apply the action if argument is vararg (not fixed).
109+
class CCIfArgVarArg<CCAction A> : CCIf<"ArgFlags.isVarArg()", A>;
110+
105111
/// CCIfPtrAddrSpace - If the top-level parent of the current argument has
106112
/// pointer type in the specified address-space.
107113
class CCIfPtrAddrSpace<int AS, CCAction A>

‎llvm/lib/CodeGen/GlobalISel/CallLowering.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -134,9 +134,10 @@ bool CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &CB,
134134
unsigned i = 0;
135135
unsigned NumFixedArgs = CB.getFunctionType()->getNumParams();
136136
for (const auto &Arg : CB.args()) {
137-
ArgInfo OrigArg{ArgRegs[i], *Arg.get(), i, getAttributesForArgIdx(CB, i),
138-
i < NumFixedArgs};
137+
ArgInfo OrigArg{ArgRegs[i], *Arg.get(), i, getAttributesForArgIdx(CB, i)};
139138
setArgFlags(OrigArg, i + AttributeList::FirstArgIndex, DL, CB);
139+
if (i >= NumFixedArgs)
140+
OrigArg.Flags[0].setVarArg();
140141

141142
// If we have an explicit sret argument that is an Instruction, (i.e., it
142143
// might point to function-local memory), we can't meaningfully tail-call.
@@ -303,7 +304,7 @@ void CallLowering::splitToValueTypes(const ArgInfo &OrigArg,
303304
// double] -> double).
304305
SplitArgs.emplace_back(OrigArg.Regs[0], SplitVTs[0].getTypeForEVT(Ctx),
305306
OrigArg.OrigArgIndex, OrigArg.Flags[0],
306-
OrigArg.IsFixed, OrigArg.OrigValue);
307+
OrigArg.OrigValue);
307308
return;
308309
}
309310

@@ -315,7 +316,7 @@ void CallLowering::splitToValueTypes(const ArgInfo &OrigArg,
315316
for (unsigned i = 0, e = SplitVTs.size(); i < e; ++i) {
316317
Type *SplitTy = SplitVTs[i].getTypeForEVT(Ctx);
317318
SplitArgs.emplace_back(OrigArg.Regs[i], SplitTy, OrigArg.OrigArgIndex,
318-
OrigArg.Flags[0], OrigArg.IsFixed);
319+
OrigArg.Flags[0]);
319320
if (NeedsRegBlock)
320321
SplitArgs.back().Flags[0].setInConsecutiveRegs();
321322
}

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2293,9 +2293,8 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
22932293
Flags.setNoExt();
22942294

22952295
for (unsigned i = 0; i < NumParts; ++i) {
2296-
Outs.push_back(ISD::OutputArg(Flags,
2297-
Parts[i].getValueType().getSimpleVT(),
2298-
VT, /*isfixed=*/true, 0, 0));
2296+
Outs.push_back(ISD::OutputArg(
2297+
Flags, Parts[i].getValueType().getSimpleVT(), VT, 0, 0));
22992298
OutVals.push_back(Parts[i]);
23002299
}
23012300
}
@@ -2311,9 +2310,9 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
23112310
assert(SwiftError.getFunctionArg() && "Need a swift error argument");
23122311
ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
23132312
Flags.setSwiftError();
2314-
Outs.push_back(ISD::OutputArg(
2315-
Flags, /*vt=*/TLI.getPointerTy(DL), /*argvt=*/EVT(TLI.getPointerTy(DL)),
2316-
/*isfixed=*/true, /*origidx=*/1, /*partOffs=*/0));
2313+
Outs.push_back(ISD::OutputArg(Flags, /*vt=*/TLI.getPointerTy(DL),
2314+
/*argvt=*/EVT(TLI.getPointerTy(DL)),
2315+
/*origidx=*/1, /*partOffs=*/0));
23172316
// Create SDNode for the swifterror virtual register.
23182317
OutVals.push_back(
23192318
DAG.getRegister(SwiftError.getOrCreateVRegUseAt(
@@ -11173,6 +11172,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1117311172
const Align OriginalAlignment(getABIAlignmentForCallingConv(ArgTy, DL));
1117411173
Flags.setOrigAlign(OriginalAlignment);
1117511174

11175+
if (i >= CLI.NumFixedArgs)
11176+
Flags.setVarArg();
1117611177
if (Args[i].Ty->isPointerTy()) {
1117711178
Flags.setPointer();
1117811179
Flags.setPointerAddrSpace(
@@ -11297,8 +11298,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1129711298
// For scalable vectors the scalable part is currently handled
1129811299
// by individual targets, so we just use the known minimum size here.
1129911300
ISD::OutputArg MyFlags(
11300-
Flags, Parts[j].getValueType().getSimpleVT(), VT,
11301-
i < CLI.NumFixedArgs, i,
11301+
Flags, Parts[j].getValueType().getSimpleVT(), VT, i,
1130211302
j * Parts[j].getValueType().getStoreSize().getKnownMinValue());
1130311303
if (NumParts > 1 && j == 0)
1130411304
MyFlags.Flags.setSplit();

‎llvm/lib/CodeGen/TargetLoweringBase.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1772,7 +1772,7 @@ void llvm::GetReturnInfo(CallingConv::ID CC, Type *ReturnType,
17721772
Flags.setZExt();
17731773

17741774
for (unsigned i = 0; i < NumParts; ++i)
1775-
Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, /*isfixed=*/true, 0, 0));
1775+
Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, 0, 0));
17761776
}
17771777
}
17781778

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8538,7 +8538,7 @@ static void analyzeCallOperands(const AArch64TargetLowering &TLI,
85388538
if (IsCalleeWin64) {
85398539
UseVarArgCC = true;
85408540
} else {
8541-
UseVarArgCC = !Outs[i].IsFixed;
8541+
UseVarArgCC = ArgFlags.isVarArg();
85428542
}
85438543
}
85448544

@@ -8995,7 +8995,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
89958995
unsigned NumArgs = Outs.size();
89968996

89978997
for (unsigned i = 0; i != NumArgs; ++i) {
8998-
if (!Outs[i].IsFixed && Outs[i].VT.isScalableVector())
8998+
if (Outs[i].Flags.isVarArg() && Outs[i].VT.isScalableVector())
89998999
report_fatal_error("Passing SVE types to variadic functions is "
90009000
"currently not supported");
90019001
}

‎llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ struct AArch64OutgoingValueAssigner
125125
bool UseVarArgsCCForFixed = IsCalleeWin && State.isVarArg();
126126

127127
bool Res;
128-
if (Info.IsFixed && !UseVarArgsCCForFixed) {
128+
if (!Flags.isVarArg() && !UseVarArgsCCForFixed) {
129129
if (!IsReturn)
130130
applyStackPassedSmallTypeDAGHack(OrigVT, ValVT, LocVT);
131131
Res = AssignFn(ValNo, ValVT, LocVT, LocInfo, Flags, State);
@@ -361,7 +361,7 @@ struct OutgoingArgHandler : public CallLowering::OutgoingValueHandler {
361361
unsigned MaxSize = MemTy.getSizeInBytes() * 8;
362362
// For varargs, we always want to extend them to 8 bytes, in which case
363363
// we disable setting a max.
364-
if (!Arg.IsFixed)
364+
if (Arg.Flags[0].isVarArg())
365365
MaxSize = 0;
366366

367367
Register ValVReg = Arg.Regs[RegIndex];

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -6729,8 +6729,7 @@ static bool CC_LoongArchAssign2GRLen(unsigned GRLen, CCState &State,
67296729
static bool CC_LoongArch(const DataLayout &DL, LoongArchABI::ABI ABI,
67306730
unsigned ValNo, MVT ValVT,
67316731
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
6732-
CCState &State, bool IsFixed, bool IsRet,
6733-
Type *OrigTy) {
6732+
CCState &State, bool IsRet, Type *OrigTy) {
67346733
unsigned GRLen = DL.getLargestLegalIntTypeSizeInBits();
67356734
assert((GRLen == 32 || GRLen == 64) && "Unspport GRLen");
67366735
MVT GRLenVT = GRLen == 32 ? MVT::i32 : MVT::i64;
@@ -6752,7 +6751,7 @@ static bool CC_LoongArch(const DataLayout &DL, LoongArchABI::ABI ABI,
67526751
case LoongArchABI::ABI_LP64F:
67536752
case LoongArchABI::ABI_ILP32D:
67546753
case LoongArchABI::ABI_LP64D:
6755-
UseGPRForFloat = !IsFixed;
6754+
UseGPRForFloat = ArgFlags.isVarArg();
67566755
break;
67576756
case LoongArchABI::ABI_ILP32S:
67586757
case LoongArchABI::ABI_LP64S:
@@ -6766,7 +6765,8 @@ static bool CC_LoongArch(const DataLayout &DL, LoongArchABI::ABI ABI,
67666765
// will not be passed by registers if the original type is larger than
67676766
// 2*GRLen, so the register alignment rule does not apply.
67686767
unsigned TwoGRLenInBytes = (2 * GRLen) / 8;
6769-
if (!IsFixed && ArgFlags.getNonZeroOrigAlign() == TwoGRLenInBytes &&
6768+
if (ArgFlags.isVarArg() &&
6769+
ArgFlags.getNonZeroOrigAlign() == TwoGRLenInBytes &&
67706770
DL.getTypeAllocSize(OrigTy) == TwoGRLenInBytes) {
67716771
unsigned RegIdx = State.getFirstUnallocated(ArgGPRs);
67726772
// Skip 'odd' register if necessary.
@@ -6916,7 +6916,7 @@ void LoongArchTargetLowering::analyzeInputArgs(
69166916
LoongArchABI::ABI ABI =
69176917
MF.getSubtarget<LoongArchSubtarget>().getTargetABI();
69186918
if (Fn(MF.getDataLayout(), ABI, i, ArgVT, CCValAssign::Full, Ins[i].Flags,
6919-
CCInfo, /*IsFixed=*/true, IsRet, ArgTy)) {
6919+
CCInfo, IsRet, ArgTy)) {
69206920
LLVM_DEBUG(dbgs() << "InputArg #" << i << " has unhandled type " << ArgVT
69216921
<< '\n');
69226922
llvm_unreachable("");
@@ -6934,7 +6934,7 @@ void LoongArchTargetLowering::analyzeOutputArgs(
69346934
LoongArchABI::ABI ABI =
69356935
MF.getSubtarget<LoongArchSubtarget>().getTargetABI();
69366936
if (Fn(MF.getDataLayout(), ABI, i, ArgVT, CCValAssign::Full, Outs[i].Flags,
6937-
CCInfo, Outs[i].IsFixed, IsRet, OrigTy)) {
6937+
CCInfo, IsRet, OrigTy)) {
69386938
LLVM_DEBUG(dbgs() << "OutputArg #" << i << " has unhandled type " << ArgVT
69396939
<< "\n");
69406940
llvm_unreachable("");
@@ -7647,8 +7647,7 @@ bool LoongArchTargetLowering::CanLowerReturn(
76477647
LoongArchABI::ABI ABI =
76487648
MF.getSubtarget<LoongArchSubtarget>().getTargetABI();
76497649
if (CC_LoongArch(MF.getDataLayout(), ABI, i, Outs[i].VT, CCValAssign::Full,
7650-
Outs[i].Flags, CCInfo, /*IsFixed=*/true, /*IsRet=*/true,
7651-
nullptr))
7650+
Outs[i].Flags, CCInfo, /*IsRet=*/true, nullptr))
76527651
return false;
76537652
}
76547653
return true;

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -330,7 +330,7 @@ class LoongArchTargetLowering : public TargetLowering {
330330
unsigned ValNo, MVT ValVT,
331331
CCValAssign::LocInfo LocInfo,
332332
ISD::ArgFlagsTy ArgFlags, CCState &State,
333-
bool IsFixed, bool IsRet, Type *OrigTy);
333+
bool IsRet, Type *OrigTy);
334334

335335
void analyzeInputArgs(MachineFunction &MF, CCState &CCInfo,
336336
const SmallVectorImpl<ISD::InputArg> &Ins, bool IsRet,

0 commit comments

Comments
 (0)