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Merge commit '2d8ee3a2d800' from llvm.org/release/19.x into stable/20240723
2 parents cfaee62 + 2d8ee3a commit 8db9fe5

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llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -283,13 +283,18 @@ void RISCVMCCodeEmitter::expandLongCondBr(const MCInst &MI,
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Offset = 4;
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}
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// Save the number fixups.
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size_t FixupStartIndex = Fixups.size();
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// Emit an unconditional jump to the destination.
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MCInst TmpInst =
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MCInstBuilder(RISCV::JAL).addReg(RISCV::X0).addOperand(SrcSymbol);
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uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);
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support::endian::write(CB, Binary, llvm::endianness::little);
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Fixups.clear();
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// Drop any fixup added so we can add the correct one.
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Fixups.resize(FixupStartIndex);
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if (SrcSymbol.isExpr()) {
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Fixups.push_back(MCFixup::create(Offset, SrcSymbol.getExpr(),
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MCFixupKind(RISCV::fixup_riscv_jal),

llvm/test/MC/RISCV/rv64-relax-all.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,3 +14,9 @@ c.beqz a0, NEAR
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# INSTR: c.j 0x0 <NEAR>
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# RELAX-INSTR: jal zero, 0x0 <NEAR>
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c.j NEAR
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bnez s0, .foo
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j .foo
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beqz s0, .foo
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.foo:
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ret

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