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arsenmarsenm
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AMDGPU: Add peephole opt baseline tests (llvm#161309)
Add tests which show missed folds of subregister extracts with intermediate full copies.
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‎llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir‎

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@@ -80,3 +80,151 @@ body: |
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%4:vreg_128 = REG_SEQUENCE %3.sub0, %subreg.sub0, %3.sub1, %subreg.sub1, %3.sub2, %subreg.sub2, %3.sub3, %subreg.sub3
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KILL implicit %4
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...
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---
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name: copy_vreg_64_subreg_from_vgpr_reg_sequence
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GCN-LABEL: name: copy_vreg_64_subreg_from_vgpr_reg_sequence
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; GCN: liveins: $vgpr0, $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
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; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]]
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; GCN-NEXT: $vgpr0 = COPY [[COPY2]]
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
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%3:vgpr_32 = COPY %2.sub0
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$vgpr0 = COPY %3
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...
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---
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name: copy_vreg_64_subreg_from_vgpr_reg_sequence_extra_copy
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GCN-LABEL: name: copy_vreg_64_subreg_from_vgpr_reg_sequence_extra_copy
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; GCN: liveins: $vgpr0, $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
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; GCN-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]]
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; GCN-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub0
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; GCN-NEXT: $vgpr0 = COPY [[COPY3]]
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
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%3:vreg_64 = COPY %2
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%4:vgpr_32 = COPY %3.sub0
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$vgpr0 = COPY %4
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...
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---
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name: copy_av_64_subreg_from_vgpr_reg_sequence
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GCN-LABEL: name: copy_av_64_subreg_from_vgpr_reg_sequence
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; GCN: liveins: $vgpr0, $vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
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; GCN-NEXT: [[COPY2:%[0-9]+]]:av_64_align2 = COPY [[REG_SEQUENCE]]
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; GCN-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub0
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; GCN-NEXT: $vgpr0 = COPY [[COPY3]]
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
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%3:av_64_align2 = COPY %2
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%4:vgpr_32 = COPY %3.sub0
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$vgpr0 = COPY %4
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...
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---
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name: copy_vreg_64_subreg_from_vgpr_reg_sequence_with_sub0_compose
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GCN-LABEL: name: copy_vreg_64_subreg_from_vgpr_reg_sequence_with_sub0_compose
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; GCN: liveins: $vgpr0_vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[COPY1]], %subreg.sub1
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; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GCN-NEXT: $vgpr0 = COPY [[COPY2]]
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%0:vreg_64 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr1
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%2:vreg_64 = REG_SEQUENCE %0.sub0, %subreg.sub0, %1, %subreg.sub1
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%3:vgpr_32 = COPY %2.sub0
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$vgpr0 = COPY %3
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...
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---
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name: copy_vreg_64_subreg_from_vgpr_reg_sequence_with_sub1_compose
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GCN-LABEL: name: copy_vreg_64_subreg_from_vgpr_reg_sequence_with_sub1_compose
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; GCN: liveins: $vgpr0_vgpr1
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]].sub1, %subreg.sub0, [[COPY1]], %subreg.sub1
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; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GCN-NEXT: $vgpr0 = COPY [[COPY2]]
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%0:vreg_64 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr1
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%2:vreg_64 = REG_SEQUENCE %0.sub1, %subreg.sub0, %1, %subreg.sub1
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%3:vgpr_32 = COPY %2.sub0
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$vgpr0 = COPY %3
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...
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---
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name: copy_vreg_64_subreg_from_multiple_vgpr_reg_sequence
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GCN-LABEL: name: copy_vreg_64_subreg_from_multiple_vgpr_reg_sequence
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; GCN: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GCN-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
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; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1
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; GCN-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[REG_SEQUENCE]], %subreg.sub0_sub1, [[REG_SEQUENCE1]], %subreg.sub2_sub3
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; GCN-NEXT: [[COPY4:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]]
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; GCN-NEXT: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE2]].sub1_sub2
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; GCN-NEXT: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
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; GCN-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]].sub0
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; GCN-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
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; GCN-NEXT: $vgpr0_vgpr1 = COPY [[COPY4]]
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; GCN-NEXT: $vgpr2_vgpr3 = COPY [[COPY5]]
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; GCN-NEXT: $vgpr4_vgpr5 = COPY [[COPY6]]
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; GCN-NEXT: $vgpr6 = COPY [[COPY7]]
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; GCN-NEXT: $vgpr6 = COPY [[COPY8]]
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vgpr_32 = COPY $vgpr2
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%3:vgpr_32 = COPY $vgpr3
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%4:vreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
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%5:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1
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%6:vreg_128 = REG_SEQUENCE %4, %subreg.sub0_sub1, %5, %subreg.sub2_sub3
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%7:vreg_64 = COPY %6.sub0_sub1
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%8:vreg_64 = COPY %6.sub1_sub2
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%9:vreg_64 = COPY %6.sub2_sub3
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%10:vgpr_32 = COPY %6.sub2
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%11:vgpr_32 = COPY %6.sub0
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$vgpr0_vgpr1 = COPY %7
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$vgpr2_vgpr3 = COPY %8
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$vgpr4_vgpr5 = COPY %9
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$vgpr6 = COPY %10
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$vgpr6 = COPY %11
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...

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