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Merge commit '0a0f077b9474' from llvm.org/main into next
2 parents 167dfdb + 0a0f077 commit aaa5869

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llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

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@@ -33,7 +33,7 @@ using namespace llvm;
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// optimal RC for Opc and Dest of MFMA. In particular, there are high RP cases
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// where it is better to produce the VGPR form (e.g. if there are VGPR users
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// of the MFMA result).
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cl::opt<bool> MFMAVGPRForm(
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static cl::opt<bool> MFMAVGPRForm(
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"amdgpu-mfma-vgpr-form", cl::Hidden,
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cl::desc("Whether to force use VGPR for Opc and Dest of MFMA. If "
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"unspecified, default to compiler heuristics"),

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