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[X86] Do not combine LRINT and TRUNC (llvm#125848) (#10385)
Per to discussions in llvm#125324, most participants are opposed to this optimization. So remove the combination to address the concerns. Fixes llvm#125324 (cherry picked from commit 8c222c1) Co-authored-by: Phoebe Wang <[email protected]>
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-5
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2 files changed

+18
-5
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llvm/lib/Target/X86/X86ISelLowering.cpp

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@@ -52654,11 +52654,6 @@ static SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
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return DAG.getNode(X86ISD::MMX_MOVD2W, DL, MVT::i32, BCSrc);
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}
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// Try to combine (trunc (vNi64 (lrint x))) to (vNi32 (lrint x)).
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if (Src.getOpcode() == ISD::LRINT && VT.getScalarType() == MVT::i32 &&
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Src.hasOneUse())
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return DAG.getNode(ISD::LRINT, DL, VT, Src.getOperand(0));
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return SDValue();
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}
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llvm/test/CodeGen/X86/lrint-conv-i64.ll

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@@ -45,6 +45,24 @@ entry:
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ret i64 %0
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}
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define i32 @PR125324(float %x) {
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; SSE-LABEL: PR125324:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: cvtss2si %xmm0, %rax
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; SSE-NEXT: # kill: def $eax killed $eax killed $rax
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR125324:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vcvtss2si %xmm0, %rax
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; AVX-NEXT: # kill: def $eax killed $eax killed $rax
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; AVX-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.lrint.i64.f32(float %x)
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%1 = trunc i64 %0 to i32
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ret i32 %1
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}
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declare i64 @llvm.lrint.i64.f32(float) nounwind readnone
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declare i64 @llvm.lrint.i64.f64(double) nounwind readnone
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declare i64 @llvm.lrint.i64.f80(x86_fp80) nounwind readnone

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