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‎llvm/lib/CodeGen/RegAllocBasic.cpp

Lines changed: 6 additions & 91 deletions
Original file line numberDiff line numberDiff line change
@@ -5,35 +5,31 @@
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the RABasic function pass, which provides a minimal
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// implementation of the basic register allocator.
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//
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///
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/// \file
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/// This file defines the RABasic function pass, which provides a minimal
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/// implementation of the basic register allocator.
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///
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//===----------------------------------------------------------------------===//
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#include "RegAllocBasic.h"
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#include "AllocationOrder.h"
15-
#include "RegAllocBase.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/ProfileSummaryInfo.h"
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#include "llvm/CodeGen/CalcSpillWeights.h"
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#include "llvm/CodeGen/LiveDebugVariables.h"
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#include "llvm/CodeGen/LiveIntervals.h"
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#include "llvm/CodeGen/LiveRangeEdit.h"
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#include "llvm/CodeGen/LiveRegMatrix.h"
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#include "llvm/CodeGen/LiveStacks.h"
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#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/RegAllocRegistry.h"
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#include "llvm/CodeGen/Spiller.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/VirtRegMap.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <queue>
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using namespace llvm;
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@@ -42,89 +38,8 @@ using namespace llvm;
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static RegisterRegAlloc basicRegAlloc("basic", "basic register allocator",
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createBasicRegisterAllocator);
4440

45-
namespace {
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struct CompSpillWeight {
47-
bool operator()(const LiveInterval *A, const LiveInterval *B) const {
48-
return A->weight() < B->weight();
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}
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};
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}
52-
53-
namespace {
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/// RABasic provides a minimal implementation of the basic register allocation
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/// algorithm. It prioritizes live virtual registers by spill weight and spills
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/// whenever a register is unavailable. This is not practical in production but
57-
/// provides a useful baseline both for measuring other allocators and comparing
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/// the speed of the basic algorithm against other styles of allocators.
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class RABasic : public MachineFunctionPass,
60-
public RegAllocBase,
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private LiveRangeEdit::Delegate {
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// context
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MachineFunction *MF = nullptr;
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// state
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std::unique_ptr<Spiller> SpillerInstance;
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std::priority_queue<const LiveInterval *, std::vector<const LiveInterval *>,
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CompSpillWeight>
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Queue;
70-
71-
// Scratch space. Allocated here to avoid repeated malloc calls in
72-
// selectOrSplit().
73-
BitVector UsableRegs;
74-
75-
bool LRE_CanEraseVirtReg(Register) override;
76-
void LRE_WillShrinkVirtReg(Register) override;
77-
78-
public:
79-
RABasic(const RegAllocFilterFunc F = nullptr);
80-
81-
/// Return the pass name.
82-
StringRef getPassName() const override { return "Basic Register Allocator"; }
83-
84-
/// RABasic analysis usage.
85-
void getAnalysisUsage(AnalysisUsage &AU) const override;
86-
87-
void releaseMemory() override;
88-
89-
Spiller &spiller() override { return *SpillerInstance; }
90-
91-
void enqueueImpl(const LiveInterval *LI) override { Queue.push(LI); }
92-
93-
const LiveInterval *dequeue() override {
94-
if (Queue.empty())
95-
return nullptr;
96-
const LiveInterval *LI = Queue.top();
97-
Queue.pop();
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return LI;
99-
}
100-
101-
MCRegister selectOrSplit(const LiveInterval &VirtReg,
102-
SmallVectorImpl<Register> &SplitVRegs) override;
103-
104-
/// Perform register allocation.
105-
bool runOnMachineFunction(MachineFunction &mf) override;
106-
107-
MachineFunctionProperties getRequiredProperties() const override {
108-
return MachineFunctionProperties().setNoPHIs();
109-
}
110-
111-
MachineFunctionProperties getClearedProperties() const override {
112-
return MachineFunctionProperties().setIsSSA();
113-
}
114-
115-
// Helper for spilling all live virtual registers currently unified under preg
116-
// that interfere with the most recently queried lvr. Return true if spilling
117-
// was successful, and append any new spilled/split intervals to splitLVRs.
118-
bool spillInterferences(const LiveInterval &VirtReg, MCRegister PhysReg,
119-
SmallVectorImpl<Register> &SplitVRegs);
120-
121-
static char ID;
122-
};
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12441
char RABasic::ID = 0;
12542

126-
} // end anonymous namespace
127-
12843
char &llvm::RABasicID = RABasic::ID;
12944

13045
INITIALIZE_PASS_BEGIN(RABasic, "regallocbasic", "Basic Register Allocator",

‎llvm/lib/CodeGen/RegAllocBasic.h

Lines changed: 104 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,104 @@
1+
//===-- RegAllocBasic.h - Basic Register Allocator Header -----------------===//
2+
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
///
9+
/// \file
10+
/// This file declares the RABasic class, which provides a minimal
11+
/// implementation of the basic register allocator.
12+
///
13+
//===----------------------------------------------------------------------===//
14+
15+
#ifndef LLVM_CODEGEN_REGALLOCBASIC_H
16+
#define LLVM_CODEGEN_REGALLOCBASIC_H
17+
18+
#include "RegAllocBase.h"
19+
#include "llvm/CodeGen/LiveRangeEdit.h"
20+
#include "llvm/CodeGen/MachineFunctionPass.h"
21+
#include "llvm/CodeGen/Spiller.h"
22+
#include <queue>
23+
24+
namespace llvm {
25+
26+
struct CompSpillWeight {
27+
bool operator()(const LiveInterval *A, const LiveInterval *B) const {
28+
return A->weight() < B->weight();
29+
}
30+
};
31+
32+
/// RABasic provides a minimal implementation of the basic register allocation
33+
/// algorithm. It prioritizes live virtual registers by spill weight and spills
34+
/// whenever a register is unavailable. This is not practical in production but
35+
/// provides a useful baseline both for measuring other allocators and comparing
36+
/// the speed of the basic algorithm against other styles of allocators.
37+
class LLVM_LIBRARY_VISIBILITY RABasic : public MachineFunctionPass,
38+
public RegAllocBase,
39+
private LiveRangeEdit::Delegate {
40+
// context
41+
MachineFunction *MF = nullptr;
42+
43+
// state
44+
std::unique_ptr<Spiller> SpillerInstance;
45+
std::priority_queue<const LiveInterval *, std::vector<const LiveInterval *>,
46+
CompSpillWeight>
47+
Queue;
48+
49+
// Scratch space. Allocated here to avoid repeated malloc calls in
50+
// selectOrSplit().
51+
BitVector UsableRegs;
52+
53+
bool LRE_CanEraseVirtReg(Register) override;
54+
void LRE_WillShrinkVirtReg(Register) override;
55+
56+
public:
57+
RABasic(const RegAllocFilterFunc F = nullptr);
58+
59+
/// Return the pass name.
60+
StringRef getPassName() const override { return "Basic Register Allocator"; }
61+
62+
/// RABasic analysis usage.
63+
void getAnalysisUsage(AnalysisUsage &AU) const override;
64+
65+
void releaseMemory() override;
66+
67+
Spiller &spiller() override { return *SpillerInstance; }
68+
69+
void enqueueImpl(const LiveInterval *LI) override { Queue.push(LI); }
70+
71+
const LiveInterval *dequeue() override {
72+
if (Queue.empty())
73+
return nullptr;
74+
const LiveInterval *LI = Queue.top();
75+
Queue.pop();
76+
return LI;
77+
}
78+
79+
MCRegister selectOrSplit(const LiveInterval &VirtReg,
80+
SmallVectorImpl<Register> &SplitVRegs) override;
81+
82+
/// Perform register allocation.
83+
bool runOnMachineFunction(MachineFunction &mf) override;
84+
85+
MachineFunctionProperties getRequiredProperties() const override {
86+
return MachineFunctionProperties().set(
87+
MachineFunctionProperties::Property::NoPHIs);
88+
}
89+
90+
MachineFunctionProperties getClearedProperties() const override {
91+
return MachineFunctionProperties().set(
92+
MachineFunctionProperties::Property::IsSSA);
93+
}
94+
95+
// Helper for spilling all live virtual registers currently unified under preg
96+
// that interfere with the most recently queried lvr. Return true if spilling
97+
// was successful, and append any new spilled/split intervals to splitLVRs.
98+
bool spillInterferences(const LiveInterval &VirtReg, MCRegister PhysReg,
99+
SmallVectorImpl<Register> &SplitVRegs);
100+
101+
static char ID;
102+
};
103+
} // namespace llvm
104+
#endif

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