Merge pull request #2541 from linux-on-ibm-z/master-s390x

Support Linux on z as a Swift platform

Author: gribozavr

CMakeLists.txt

@@ -439,6 +439,8 @@ else()
     set(SWIFT_HOST_VARIANT_ARCH_default "powerpc64")
   elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "ppc64le")
     set(SWIFT_HOST_VARIANT_ARCH_default "powerpc64le")
+  elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "s390x")
+    set(SWIFT_HOST_VARIANT_ARCH_default "s390x")
   # FIXME: Only matches v6l/v7l - by far the most common variants
   elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "armv6l")
     set(SWIFT_HOST_VARIANT_ARCH_default "armv6")
@@ -507,6 +509,8 @@ if("${SWIFT_HOST_VARIANT_SDK}" STREQUAL "LINUX")
       set(SWIFT_HOST_TRIPLE "aarch64-unknown-linux-gnu")
     elseif("${SWIFT_HOST_VARIANT_ARCH}" MATCHES "(powerpc64|powerpc64le)")
       set(SWIFT_HOST_TRIPLE "${SWIFT_HOST_VARIANT_ARCH}-unknown-linux-gnu")
+    elseif("${SWIFT_HOST_VARIANT_ARCH}" MATCHES "s390x")
+      set(SWIFT_HOST_TRIPLE "s390x-unknown-linux-gnu")
     elseif("${SWIFT_HOST_VARIANT_ARCH}" MATCHES "(armv6|armv7)")
       set(SWIFT_HOST_TRIPLE "${SWIFT_HOST_VARIANT_ARCH}-unknown-linux-gnueabihf")
     else()

cmake/modules/SwiftSetIfArchBitness.cmake

@@ -16,7 +16,8 @@ function(set_if_arch_bitness var_name)
          "${SIA_ARCH}" STREQUAL "arm64" OR
          "${SIA_ARCH}" STREQUAL "aarch64" OR
          "${SIA_ARCH}" STREQUAL "powerpc64" OR
-         "${SIA_ARCH}" STREQUAL "powerpc64le")
+         "${SIA_ARCH}" STREQUAL "powerpc64le" OR
+         "${SIA_ARCH}" STREQUAL "s390x")
     set("${var_name}" "${SIA_CASE_64_BIT}" PARENT_SCOPE)
   else()
     message(FATAL_ERROR "Unknown architecture: ${SIA_ARCH}")

include/swift/ABI/System.h

@@ -97,4 +97,9 @@
 // Heap objects are pointer-aligned, so the low three bits are unused.
 #define SWIFT_ABI_POWERPC64_SWIFT_SPARE_BITS_MASK 0x0000000000000007ULL
 
+/*********************************** s390x ************************************/
+
+// Top byte of pointers is unused, and heap objects are eight-byte aligned.
+#define SWIFT_ABI_S390X_SWIFT_SPARE_BITS_MASK 0x0000000000000007ULL
+
 #endif /* SWIFT_ABI_SYSTEM_H */

include/swift/Basic/LangOptions.h

@@ -233,6 +233,10 @@ namespace swift {
     /// a supported target architecture.
     static bool isPlatformConditionArchSupported(StringRef ArchName);
 
+    /// Returns true if the 'endian' platform condition argument represents
+    /// a supported target endianness.
+    static bool isPlatformConditionEndiannessSupported(StringRef endianness);
+
   private:
     llvm::SmallVector<std::pair<std::string, std::string>, 3>
         PlatformConditionValues;

include/swift/Runtime/Config.h

@@ -33,8 +33,12 @@
 /// Does the current Swift platform use LLVM's intrinsic "swiftcall"
 /// calling convention for Swift functions?
 #ifndef SWIFT_USE_SWIFTCALL
+#ifdef __s390x__
+#define SWIFT_USE_SWIFTCALL 1
+#else
 #define SWIFT_USE_SWIFTCALL 0
 #endif
+#endif
 
 /// Does the current Swift platform allow information other than the
 /// class pointer to be stored in the isa field?  If so, when deriving

include/swift/Runtime/HeapObject.h

@@ -157,10 +157,12 @@ using BoxPair = TwoWordPair<HeapObject *, OpaqueValue *>;
 /// The heap object has an initial retain count of 1, and its metadata is set
 /// such that destroying the heap object destroys the contained value.
 SWIFT_RUNTIME_EXPORT
-extern "C" BoxPair::Return swift_allocBox(Metadata const *type);
+extern "C" BoxPair::Return swift_allocBox(Metadata const *type)
+           SWIFT_CC(swift);
 
 SWIFT_RUNTIME_EXPORT
-extern "C" BoxPair::Return (*_swift_allocBox)(Metadata const *type);
+extern "C" BoxPair::Return (*_swift_allocBox)(Metadata const *type)
+           SWIFT_CC(swift);
 
 
 // Allocate plain old memory. This is the generalized entry point

include/swift/Runtime/Metadata.h

@@ -1046,6 +1046,17 @@ static const uintptr_t ObjCReservedBitsMask =
 static const unsigned ObjCReservedLowBits =
   SWIFT_ABI_DEFAULT_OBJC_NUM_RESERVED_LOW_BITS;
 
+#elif defined(__s390x__)
+
+static const uintptr_t LeastValidPointerValue =
+  SWIFT_ABI_DEFAULT_LEAST_VALID_POINTER;
+static const uintptr_t SwiftSpareBitsMask =
+  SWIFT_ABI_S390X_SWIFT_SPARE_BITS_MASK;
+static const uintptr_t ObjCReservedBitsMask =
+  SWIFT_ABI_DEFAULT_OBJC_RESERVED_BITS_MASK;
+static const unsigned ObjCReservedLowBits =
+  SWIFT_ABI_DEFAULT_OBJC_NUM_RESERVED_LOW_BITS;
+
 #else
 
 static const uintptr_t LeastValidPointerValue =

lib/Basic/LangOptions.cpp

@@ -40,7 +40,13 @@ static const StringRef SupportedConditionalCompilationArches[] = {
   "i386",
   "x86_64",
   "powerpc64",
-  "powerpc64le"
+  "powerpc64le",
+  "s390x"
+};
+
+static const StringRef SupportedConditionalCompilationEndianness[] = {
+  "little",
+  "big"
 };
 
 bool LangOptions::isPlatformConditionOSSupported(StringRef OSName) {
@@ -58,6 +64,14 @@ LangOptions::isPlatformConditionArchSupported(StringRef ArchName) {
   return foundIt != std::end(SupportedConditionalCompilationArches);
 }
 
+bool
+LangOptions::isPlatformConditionEndiannessSupported(StringRef Endianness) {
+  auto foundIt = std::find(std::begin(SupportedConditionalCompilationEndianness),
+                           std::end(SupportedConditionalCompilationEndianness),
+                           Endianness);
+  return foundIt != std::end(SupportedConditionalCompilationEndianness);
+}
+
 StringRef
 LangOptions::getPlatformConditionValue(StringRef Name) const {
   // Last one wins.
@@ -141,13 +155,44 @@ std::pair<bool, bool> LangOptions::setTarget(llvm::Triple triple) {
   case llvm::Triple::ArchType::x86_64:
     addPlatformConditionValue("arch", "x86_64");
     break;
+  case llvm::Triple::ArchType::systemz:
+    addPlatformConditionValue("arch", "s390x");
+    break;
   default:
     UnsupportedArch = true;
   }
 
   if (UnsupportedOS || UnsupportedArch)
     return { UnsupportedOS, UnsupportedArch };
 
+  // Set the "_endian" platform condition.
+  switch (Target.getArch()) {
+  case llvm::Triple::ArchType::arm:
+  case llvm::Triple::ArchType::thumb:
+    addPlatformConditionValue("_endian", "little");
+    break;
+  case llvm::Triple::ArchType::aarch64:
+    addPlatformConditionValue("_endian", "little");
+    break;
+  case llvm::Triple::ArchType::ppc64:
+    addPlatformConditionValue("_endian", "big");
+    break;
+  case llvm::Triple::ArchType::ppc64le:
+    addPlatformConditionValue("_endian", "little");
+    break;
+  case llvm::Triple::ArchType::x86:
+    addPlatformConditionValue("_endian", "little");
+    break;
+  case llvm::Triple::ArchType::x86_64:
+    addPlatformConditionValue("_endian", "little");
+    break;
+  case llvm::Triple::ArchType::systemz:
+    addPlatformConditionValue("_endian", "big");
+    break;
+  default:
+    llvm_unreachable("undefined architecture endianness");
+  }
+
   // Set the "runtime" platform condition.
   if (EnableObjCInterop)
     addPlatformConditionValue("_runtime", "_ObjC");

lib/IRGen/GenMeta.cpp

@@ -4338,16 +4338,20 @@ irgen::emitClassResilientInstanceSizeAndAlignMask(IRGenFunction &IGF,
          && "didn't find size or alignment in metadata?!");
   Address metadataAsBytes(IGF.Builder.CreateBitCast(metadata, IGF.IGM.Int8PtrTy),
                           IGF.IGM.getPointerAlignment());
-  auto loadZExtInt32AtOffset = [&](Size offset) {
-    Address slot = IGF.Builder.CreateConstByteArrayGEP(metadataAsBytes, offset);
-    slot = IGF.Builder.CreateBitCast(slot, IGF.IGM.Int32Ty->getPointerTo());
-    llvm::Value *result = IGF.Builder.CreateLoad(slot);
-    if (IGF.IGM.SizeTy != IGF.IGM.Int32Ty)
-      result = IGF.Builder.CreateZExt(result, IGF.IGM.SizeTy);
-    return result;
-  };
-  llvm::Value *size = loadZExtInt32AtOffset(scanner.InstanceSize);
-  llvm::Value *alignMask = loadZExtInt32AtOffset(scanner.InstanceAlignMask);
+
+  Address slot = IGF.Builder.CreateConstByteArrayGEP(metadataAsBytes,
+                                                     scanner.InstanceSize);
+  slot = IGF.Builder.CreateBitCast(slot, IGF.IGM.Int32Ty->getPointerTo());
+  llvm::Value *size = IGF.Builder.CreateLoad(slot);
+  if (IGF.IGM.SizeTy != IGF.IGM.Int32Ty)
+    size = IGF.Builder.CreateZExt(size, IGF.IGM.SizeTy);
+
+  slot = IGF.Builder.CreateConstByteArrayGEP(metadataAsBytes,
+                                             scanner.InstanceAlignMask);
+  slot = IGF.Builder.CreateBitCast(slot, IGF.IGM.Int16Ty->getPointerTo());
+  llvm::Value *alignMask = IGF.Builder.CreateLoad(slot);
+  alignMask = IGF.Builder.CreateZExt(alignMask, IGF.IGM.SizeTy);
+
   return {size, alignMask};
 }
 

lib/IRGen/SwiftTargetInfo.cpp

@@ -103,6 +103,13 @@ static void configurePowerPC64(IRGenModule &IGM, const llvm::Triple &triple,
             SWIFT_ABI_POWERPC64_SWIFT_SPARE_BITS_MASK);
 }
 
+/// Configures target-specific information for SystemZ platforms.
+static void configureSystemZ(IRGenModule &IGM, const llvm::Triple &triple,
+                             SwiftTargetInfo &target) {
+  setToMask(target.PointerSpareBits, 64,
+            SWIFT_ABI_S390X_SWIFT_SPARE_BITS_MASK);
+}
+
 /// Configure a default target.
 SwiftTargetInfo::SwiftTargetInfo(
   llvm::Triple::ObjectFormatType outputObjectFormat,
@@ -154,6 +161,10 @@ SwiftTargetInfo SwiftTargetInfo::get(IRGenModule &IGM) {
     configurePowerPC64(IGM, triple, target);
     break;
 
+  case llvm::Triple::systemz:
+    configureSystemZ(IGM, triple, target);
+    break;
+
   default:
     // FIXME: Complain here? Default target info is unlikely to be correct.
     break;