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[sil] Add the ability for the frontend to dump LoweredSIL before IRGen.
This is something that I have wanted to add for a while and have never had the need to. I need it now to fix a bug in the bots where I am forced to use IRGen output to test ThunkLowering which causes platform level differences to show up in the FileCheck output. With this, I can just emit the actual lowered SIL output and just test it at that level. There are other cases like this where we are unable to test lowered SIL so we use IRGen creating this brittleness. Hopefully this stops this problem from showing up in the future. rdar://138845396
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11 files changed

+63
-10
lines changed

11 files changed

+63
-10
lines changed

‎include/swift/Basic/FileTypes.def

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@ TYPE("swiftmodulesummary", SwiftModuleSummaryFile, "swiftmodulesummary", "")
5656
TYPE("swiftsourceinfo", SwiftSourceInfoFile, "swiftsourceinfo", "")
5757
TYPE("assembly", Assembly, "s", "")
5858
TYPE("raw-sil", RawSIL, "sil", "")
59+
TYPE("lowered-sil", LoweredSIL, "sil", "")
5960
TYPE("raw-sib", RawSIB, "sib", "")
6061
TYPE("llvm-ir", LLVM_IR, "ll", "")
6162
TYPE("raw-llvm-ir", RawLLVM_IR, "ll", "")

‎include/swift/Frontend/FrontendOptions.h

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -182,20 +182,21 @@ class FrontendOptions {
182182
Immediate, ///< Immediate mode
183183
REPL, ///< REPL mode
184184

185-
EmitAssembly, ///< Emit assembly
186-
EmitIRGen, ///< Emit LLVM IR before LLVM optimizations
187-
EmitIR, ///< Emit LLVM IR after LLVM optimizations
188-
EmitBC, ///< Emit LLVM BC
189-
EmitObject, ///< Emit object file
185+
EmitAssembly, ///< Emit assembly
186+
EmitLoweredSIL, ///< Emit lowered SIL before IRGen runs
187+
EmitIRGen, ///< Emit LLVM IR before LLVM optimizations
188+
EmitIR, ///< Emit LLVM IR after LLVM optimizations
189+
EmitBC, ///< Emit LLVM BC
190+
EmitObject, ///< Emit object file
190191

191192
DumpTypeInfo, ///< Dump IRGen type info
192193

193194
EmitPCM, ///< Emit precompiled Clang module from a module map
194195
DumpPCM, ///< Dump information about a precompiled Clang module
195196

196-
ScanDependencies, ///< Scan dependencies of Swift source files
197-
PrintVersion, ///< Print version information.
198-
PrintFeature, ///< Print supported feature of this compiler
197+
ScanDependencies, ///< Scan dependencies of Swift source files
198+
PrintVersion, ///< Print version information.
199+
PrintFeature, ///< Print supported feature of this compiler
199200
};
200201

201202
/// Indicates the action the user requested that the frontend perform.

‎include/swift/Option/Options.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1287,6 +1287,8 @@ def emit_sil : Flag<["-"], "emit-sil">,
12871287
HelpText<"Emit canonical SIL file(s)">, ModeOpt;
12881288
def emit_silgen : Flag<["-"], "emit-silgen">,
12891289
HelpText<"Emit raw SIL file(s)">, ModeOpt;
1290+
def emit_lowered_sil : Flag<["-"], "emit-lowered-sil">,
1291+
HelpText<"Emit lowered SIL file(s)">, ModeOpt;
12901292
def emit_sib : Flag<["-"], "emit-sib">,
12911293
HelpText<"Emit serialized AST + canonical SIL file(s)">, ModeOpt;
12921294
def emit_sibgen : Flag<["-"], "emit-sibgen">,

‎lib/Basic/FileTypes.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,7 @@ bool file_types::isTextual(ID Id) {
9393
switch (Id) {
9494
case file_types::TY_Swift:
9595
case file_types::TY_SIL:
96+
case file_types::TY_LoweredSIL:
9697
case file_types::TY_Dependencies:
9798
case file_types::TY_Assembly:
9899
case file_types::TY_ASTDump:
@@ -160,6 +161,7 @@ bool file_types::isAfterLLVM(ID Id) {
160161
case file_types::TY_ImportedModules:
161162
case file_types::TY_TBD:
162163
case file_types::TY_SIL:
164+
case file_types::TY_LoweredSIL:
163165
case file_types::TY_Dependencies:
164166
case file_types::TY_ASTDump:
165167
case file_types::TY_RawSIL:
@@ -211,6 +213,7 @@ bool file_types::isPartOfSwiftCompilation(ID Id) {
211213
switch (Id) {
212214
case file_types::TY_Swift:
213215
case file_types::TY_SIL:
216+
case file_types::TY_LoweredSIL:
214217
case file_types::TY_RawSIL:
215218
case file_types::TY_SIB:
216219
case file_types::TY_RawSIB:
@@ -274,6 +277,7 @@ bool file_types::isProducedFromDiagnostics(ID Id) {
274277
return true;
275278
case file_types::TY_Swift:
276279
case file_types::TY_SIL:
280+
case file_types::TY_LoweredSIL:
277281
case file_types::TY_RawSIL:
278282
case file_types::TY_SIB:
279283
case file_types::TY_RawSIB:

‎lib/Driver/Driver.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1160,6 +1160,10 @@ void Driver::buildOutputInfo(const ToolChain &TC, const DerivedArgList &Args,
11601160
OI.CompilerOutputType = file_types::TY_RawSIL;
11611161
break;
11621162

1163+
case options::OPT_emit_lowered_sil:
1164+
OI.CompilerOutputType = file_types::TY_LoweredSIL;
1165+
break;
1166+
11631167
case options::OPT_emit_sib:
11641168
OI.CompilerOutputType = file_types::TY_SIB;
11651169
break;
@@ -1619,6 +1623,7 @@ void Driver::buildActions(SmallVectorImpl<const Action *> &TopLevelActions,
16191623
switch (InputType) {
16201624
case file_types::TY_Swift:
16211625
case file_types::TY_SIL:
1626+
case file_types::TY_LoweredSIL:
16221627
case file_types::TY_SIB: {
16231628
// Source inputs always need to be compiled.
16241629
assert(file_types::isPartOfSwiftCompilation(InputType));

‎lib/Driver/ToolChains.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -708,6 +708,8 @@ const char *ToolChain::JobContext::computeFrontendModeForCompile() const {
708708
return "-emit-silgen";
709709
case file_types::TY_SIL:
710710
return "-emit-sil";
711+
case file_types::TY_LoweredSIL:
712+
return "-emit-lowered-sil";
711713
case file_types::TY_RawSIB:
712714
return "-emit-sibgen";
713715
case file_types::TY_SIB:
@@ -1008,6 +1010,7 @@ ToolChain::constructInvocation(const BackendJobAction &job,
10081010
case file_types::TY_RawSIL:
10091011
case file_types::TY_RawSIB:
10101012
case file_types::TY_SIL:
1013+
case file_types::TY_LoweredSIL:
10111014
case file_types::TY_SIB:
10121015
case file_types::TY_PCH:
10131016
case file_types::TY_ClangModuleFile:

‎lib/Frontend/ArgsToFrontendOptionsConverter.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -547,6 +547,8 @@ ArgsToFrontendOptionsConverter::determineRequestedAction(const ArgList &args) {
547547
return FrontendOptions::ActionType::EmitSIL;
548548
if (Opt.matches(OPT_emit_silgen))
549549
return FrontendOptions::ActionType::EmitSILGen;
550+
if (Opt.matches(OPT_emit_lowered_sil))
551+
return FrontendOptions::ActionType::EmitLoweredSIL;
550552
if (Opt.matches(OPT_emit_sib))
551553
return FrontendOptions::ActionType::EmitSIB;
552554
if (Opt.matches(OPT_emit_sibgen))

‎lib/Frontend/FrontendOptions.cpp

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,7 @@ bool FrontendOptions::needsProperModuleName(ActionType action) {
4747
return false;
4848
case ActionType::EmitSILGen:
4949
case ActionType::EmitSIL:
50+
case ActionType::EmitLoweredSIL:
5051
case ActionType::EmitSIBGen:
5152
case ActionType::EmitSIB:
5253
case ActionType::EmitModuleOnly:
@@ -113,6 +114,7 @@ bool FrontendOptions::doesActionRequireSwiftStandardLibrary(ActionType action) {
113114
case ActionType::DumpTypeRefinementContexts:
114115
case ActionType::EmitSILGen:
115116
case ActionType::EmitSIL:
117+
case ActionType::EmitLoweredSIL:
116118
case ActionType::EmitModuleOnly:
117119
case ActionType::MergeModules:
118120
case ActionType::EmitSIBGen:
@@ -158,6 +160,7 @@ bool FrontendOptions::doesActionRequireInputs(ActionType action) {
158160
case ActionType::DumpTypeRefinementContexts:
159161
case ActionType::EmitSILGen:
160162
case ActionType::EmitSIL:
163+
case ActionType::EmitLoweredSIL:
161164
case ActionType::EmitModuleOnly:
162165
case ActionType::MergeModules:
163166
case ActionType::EmitSIBGen:
@@ -200,6 +203,7 @@ bool FrontendOptions::doesActionPerformEndOfPipelineActions(ActionType action) {
200203
case ActionType::DumpTypeRefinementContexts:
201204
case ActionType::EmitSILGen:
202205
case ActionType::EmitSIL:
206+
case ActionType::EmitLoweredSIL:
203207
case ActionType::EmitModuleOnly:
204208
case ActionType::MergeModules:
205209
case ActionType::EmitSIBGen:
@@ -252,6 +256,7 @@ bool FrontendOptions::supportCompilationCaching(ActionType action) {
252256
case ActionType::EmitObject:
253257
case ActionType::EmitSILGen:
254258
case ActionType::EmitSIL:
259+
case ActionType::EmitLoweredSIL:
255260
case ActionType::EmitModuleOnly:
256261
case ActionType::EmitSIBGen:
257262
case ActionType::EmitSIB:
@@ -315,6 +320,9 @@ FrontendOptions::formatForPrincipalOutputFileForAction(ActionType action) {
315320
case ActionType::EmitSIL:
316321
return TY_SIL;
317322

323+
case ActionType::EmitLoweredSIL:
324+
return TY_LoweredSIL;
325+
318326
case ActionType::EmitSIBGen:
319327
return TY_RawSIB;
320328

@@ -387,6 +395,7 @@ bool FrontendOptions::canActionEmitDependencies(ActionType action) {
387395
case ActionType::EmitPCH:
388396
case ActionType::EmitSILGen:
389397
case ActionType::EmitSIL:
398+
case ActionType::EmitLoweredSIL:
390399
case ActionType::EmitSIBGen:
391400
case ActionType::EmitSIB:
392401
case ActionType::EmitIRGen:
@@ -431,6 +440,7 @@ bool FrontendOptions::canActionEmitReferenceDependencies(ActionType action) {
431440
case ActionType::EmitPCH:
432441
case ActionType::EmitSILGen:
433442
case ActionType::EmitSIL:
443+
case ActionType::EmitLoweredSIL:
434444
case ActionType::EmitSIBGen:
435445
case ActionType::EmitSIB:
436446
case ActionType::EmitIRGen:
@@ -475,6 +485,7 @@ bool FrontendOptions::canActionEmitModuleSummary(ActionType action) {
475485
case ActionType::PrintFeature:
476486
return false;
477487
case ActionType::EmitSIL:
488+
case ActionType::EmitLoweredSIL:
478489
case ActionType::EmitSIB:
479490
case ActionType::EmitIRGen:
480491
case ActionType::EmitIR:
@@ -515,6 +526,7 @@ bool FrontendOptions::canActionEmitClangHeader(ActionType action) {
515526
case ActionType::EmitModuleOnly:
516527
case ActionType::EmitSILGen:
517528
case ActionType::EmitSIL:
529+
case ActionType::EmitLoweredSIL:
518530
case ActionType::EmitSIBGen:
519531
case ActionType::EmitSIB:
520532
case ActionType::EmitIRGen:
@@ -557,6 +569,7 @@ bool FrontendOptions::canActionEmitLoadedModuleTrace(ActionType action) {
557569
case ActionType::EmitPCH:
558570
case ActionType::EmitSILGen:
559571
case ActionType::EmitSIL:
572+
case ActionType::EmitLoweredSIL:
560573
case ActionType::EmitSIBGen:
561574
case ActionType::EmitSIB:
562575
case ActionType::EmitIRGen:
@@ -599,6 +612,7 @@ bool FrontendOptions::canActionEmitModuleSemanticInfo(ActionType action) {
599612
case ActionType::PrintVersion:
600613
case ActionType::PrintFeature:
601614
case ActionType::EmitSIL:
615+
case ActionType::EmitLoweredSIL:
602616
case ActionType::EmitSIBGen:
603617
case ActionType::EmitSIB:
604618
case ActionType::EmitIRGen:
@@ -647,6 +661,7 @@ bool FrontendOptions::canActionEmitConstValues(ActionType action) {
647661
case ActionType::EmitPCH:
648662
case ActionType::EmitSILGen:
649663
case ActionType::EmitSIL:
664+
case ActionType::EmitLoweredSIL:
650665
case ActionType::EmitSIBGen:
651666
case ActionType::EmitSIB:
652667
case ActionType::EmitIRGen:
@@ -688,6 +703,7 @@ bool FrontendOptions::canActionEmitModule(ActionType action) {
688703
case ActionType::MergeModules:
689704
case ActionType::EmitModuleOnly:
690705
case ActionType::EmitSIL:
706+
case ActionType::EmitLoweredSIL:
691707
case ActionType::EmitSIBGen:
692708
case ActionType::EmitSIB:
693709
case ActionType::EmitIRGen:
@@ -735,6 +751,7 @@ bool FrontendOptions::canActionEmitInterface(ActionType action) {
735751
case ActionType::MergeModules:
736752
case ActionType::EmitModuleOnly:
737753
case ActionType::EmitSIL:
754+
case ActionType::EmitLoweredSIL:
738755
case ActionType::EmitSIB:
739756
case ActionType::EmitIRGen:
740757
case ActionType::EmitIR:
@@ -777,6 +794,7 @@ bool FrontendOptions::canActionEmitAPIDescriptor(ActionType action) {
777794
case ActionType::MergeModules:
778795
case ActionType::EmitModuleOnly:
779796
case ActionType::EmitSIL:
797+
case ActionType::EmitLoweredSIL:
780798
case ActionType::EmitSIB:
781799
case ActionType::EmitIRGen:
782800
case ActionType::EmitIR:
@@ -804,6 +822,7 @@ bool FrontendOptions::doesActionProduceOutput(ActionType action) {
804822
case ActionType::EmitPCH:
805823
case ActionType::EmitSILGen:
806824
case ActionType::EmitSIL:
825+
case ActionType::EmitLoweredSIL:
807826
case ActionType::EmitSIBGen:
808827
case ActionType::EmitSIB:
809828
case ActionType::EmitModuleOnly:
@@ -862,6 +881,7 @@ bool FrontendOptions::doesActionProduceTextualOutput(ActionType action) {
862881
case ActionType::EmitImportedModules:
863882
case ActionType::EmitSILGen:
864883
case ActionType::EmitSIL:
884+
case ActionType::EmitLoweredSIL:
865885
case ActionType::EmitAssembly:
866886
case ActionType::EmitIRGen:
867887
case ActionType::EmitIR:
@@ -901,6 +921,7 @@ bool FrontendOptions::doesActionGenerateSIL(ActionType action) {
901921
case ActionType::EmitSILGen:
902922
case ActionType::EmitSIBGen:
903923
case ActionType::EmitSIL:
924+
case ActionType::EmitLoweredSIL:
904925
case ActionType::EmitSIB:
905926
case ActionType::EmitModuleOnly:
906927
case ActionType::MergeModules:
@@ -938,6 +959,7 @@ bool FrontendOptions::doesActionGenerateIR(ActionType action) {
938959
case ActionType::EmitPCH:
939960
case ActionType::EmitSILGen:
940961
case ActionType::EmitSIL:
962+
case ActionType::EmitLoweredSIL:
941963
case ActionType::EmitSIBGen:
942964
case ActionType::EmitSIB:
943965
case ActionType::EmitImportedModules:
@@ -981,6 +1003,7 @@ bool FrontendOptions::doesActionBuildModuleFromInterface(ActionType action) {
9811003
case ActionType::EmitPCH:
9821004
case ActionType::EmitSILGen:
9831005
case ActionType::EmitSIL:
1006+
case ActionType::EmitLoweredSIL:
9841007
case ActionType::EmitSIBGen:
9851008
case ActionType::EmitSIB:
9861009
case ActionType::EmitImportedModules:

‎lib/FrontendTool/FrontendTool.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1279,6 +1279,7 @@ static bool performAction(CompilerInstance &Instance,
12791279
case FrontendOptions::ActionType::EmitSILGen:
12801280
case FrontendOptions::ActionType::EmitSIBGen:
12811281
case FrontendOptions::ActionType::EmitSIL:
1282+
case FrontendOptions::ActionType::EmitLoweredSIL:
12821283
case FrontendOptions::ActionType::EmitSIB:
12831284
case FrontendOptions::ActionType::EmitModuleOnly:
12841285
case FrontendOptions::ActionType::MergeModules:
@@ -1748,6 +1749,10 @@ static bool performCompileStepsPostSILGen(CompilerInstance &Instance,
17481749

17491750
runSILLoweringPasses(*SM);
17501751

1752+
// If we are asked to emit lowered SIL, dump it now and return.
1753+
if (Action == FrontendOptions::ActionType::EmitLoweredSIL)
1754+
return writeSIL(*SM, PSPs, Instance, Invocation.getSILOptions());
1755+
17511756
// Cancellation check after SILLowering.
17521757
if (Instance.isCancellationRequested())
17531758
return true;

‎test/Frontend/lowered_sil.swift

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
// RUN: %target-swift-frontend -o - -emit-lowered-sil %s | %FileCheck %s
2+
3+
// CHECK: sil_stage lowered
4+
5+
func test() {
6+
}

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