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AnthonyLatsisAnthonyLatsis
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Merge pull request #83205 from swiftlang/jepa-rebranch
Address deprecation warnings
2 parents eb67914 + b04d608 commit 552d6c7

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10 files changed

+30
-28
lines changed

10 files changed

+30
-28
lines changed

‎lib/DriverTool/swift_llvm_opt_main.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -135,7 +135,7 @@ getTargetMachine(llvm::Triple TheTriple, StringRef CPUStr,
135135
}
136136

137137
return TheTarget->createTargetMachine(
138-
TheTriple.getTriple(), CPUStr, FeaturesStr, targetOptions,
138+
TheTriple, CPUStr, FeaturesStr, targetOptions,
139139
std::optional<llvm::Reloc::Model>(llvm::codegen::getExplicitRelocModel()),
140140
llvm::codegen::getExplicitCodeModel(), GetCodeGenOptLevel(options));
141141
}

‎lib/IRGen/GenBuiltin.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -444,9 +444,9 @@ void irgen::emitBuiltinCall(IRGenFunction &IGF, const BuiltinInfo &Builtin,
444444
SmallVector<llvm::Type*, 4> ArgTys;
445445
for (auto T : IInfo.Types)
446446
ArgTys.push_back(IGF.IGM.getStorageTypeForLowered(T->getCanonicalType()));
447-
448-
auto F = llvm::Intrinsic::getDeclaration(&IGF.IGM.Module,
449-
(llvm::Intrinsic::ID)IID, ArgTys);
447+
448+
auto F = llvm::Intrinsic::getOrInsertDeclaration(
449+
&IGF.IGM.Module, (llvm::Intrinsic::ID)IID, ArgTys);
450450
llvm::FunctionType *FT = F->getFunctionType();
451451
SmallVector<llvm::Value*, 8> IRArgs;
452452
for (unsigned i = 0, e = FT->getNumParams(); i != e; ++i)
@@ -512,7 +512,7 @@ void irgen::emitBuiltinCall(IRGenFunction &IGF, const BuiltinInfo &Builtin,
512512
SmallVector<llvm::Type *, 2> ArgTys; \
513513
auto opType = Builtin.Types[0]->getCanonicalType(); \
514514
ArgTys.push_back(IGF.IGM.getStorageTypeForLowered(opType)); \
515-
auto F = llvm::Intrinsic::getDeclaration( \
515+
auto F = llvm::Intrinsic::getOrInsertDeclaration( \
516516
&IGF.IGM.Module, getLLVMIntrinsicIDForBuiltinWithOverflow(Builtin.ID), \
517517
ArgTys); \
518518
SmallVector<llvm::Value *, 2> IRArgs; \

‎lib/IRGen/GenDecl.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -5933,9 +5933,8 @@ void IRGenModule::emitExtension(ExtensionDecl *ext) {
59335933
Address IRGenFunction::createAlloca(llvm::Type *type,
59345934
Alignment alignment,
59355935
const llvm::Twine &name) {
5936-
llvm::AllocaInst *alloca =
5937-
new llvm::AllocaInst(type, IGM.DataLayout.getAllocaAddrSpace(), name,
5938-
AllocaIP);
5936+
llvm::AllocaInst *alloca = new llvm::AllocaInst(
5937+
type, IGM.DataLayout.getAllocaAddrSpace(), name, AllocaIP->getIterator());
59395938
alloca->setAlignment(llvm::MaybeAlign(alignment.getValue()).valueOrOne());
59405939
return Address(alloca, type, alignment);
59415940
}
@@ -5945,9 +5944,10 @@ Address IRGenFunction::createAlloca(llvm::Type *type,
59455944
llvm::Value *ArraySize,
59465945
Alignment alignment,
59475946
const llvm::Twine &name) {
5948-
llvm::AllocaInst *alloca = new llvm::AllocaInst(
5949-
type, IGM.DataLayout.getAllocaAddrSpace(), ArraySize,
5950-
llvm::MaybeAlign(alignment.getValue()).valueOrOne(), name, AllocaIP);
5947+
llvm::AllocaInst *alloca =
5948+
new llvm::AllocaInst(type, IGM.DataLayout.getAllocaAddrSpace(), ArraySize,
5949+
llvm::MaybeAlign(alignment.getValue()).valueOrOne(),
5950+
name, AllocaIP->getIterator());
59515951
return Address(alloca, type, alignment);
59525952
}
59535953

‎lib/IRGen/IRBuilder.h‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -310,8 +310,8 @@ class IRBuilder : public IRBuilderBase {
310310
// FunctionPointer.
311311

312312
bool isTrapIntrinsic(llvm::Value *Callee) {
313-
return Callee ==
314-
llvm::Intrinsic::getDeclaration(getModule(), llvm::Intrinsic::trap);
313+
return Callee == llvm::Intrinsic::getOrInsertDeclaration(
314+
getModule(), llvm::Intrinsic::trap);
315315
}
316316
bool isTrapIntrinsic(llvm::Intrinsic::ID intrinsicID) {
317317
return intrinsicID == llvm::Intrinsic::trap;
@@ -381,7 +381,7 @@ class IRBuilder : public IRBuilderBase {
381381
const Twine &name = "") {
382382
assert(!isTrapIntrinsic(intrinsicID) && "Use CreateNonMergeableTrap");
383383
auto intrinsicFn =
384-
llvm::Intrinsic::getDeclaration(getModule(), intrinsicID);
384+
llvm::Intrinsic::getOrInsertDeclaration(getModule(), intrinsicID);
385385
return CreateCallWithoutDbgLoc(
386386
cast<llvm::FunctionType>(intrinsicFn->getValueType()), intrinsicFn,
387387
args, name);
@@ -393,8 +393,8 @@ class IRBuilder : public IRBuilderBase {
393393
ArrayRef<llvm::Value *> args,
394394
const Twine &name = "") {
395395
assert(!isTrapIntrinsic(intrinsicID) && "Use CreateNonMergeableTrap");
396-
auto intrinsicFn =
397-
llvm::Intrinsic::getDeclaration(getModule(), intrinsicID, typeArgs);
396+
auto intrinsicFn = llvm::Intrinsic::getOrInsertDeclaration(
397+
getModule(), intrinsicID, typeArgs);
398398
return CreateCallWithoutDbgLoc(
399399
cast<llvm::FunctionType>(intrinsicFn->getValueType()), intrinsicFn,
400400
args, name);

‎lib/IRGen/IRGen.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1061,7 +1061,7 @@ swift::createTargetMachine(const IRGenOptions &Opts, ASTContext &Ctx) {
10611061

10621062
// Create a target machine.
10631063
llvm::TargetMachine *TargetMachine = Target->createTargetMachine(
1064-
EffectiveTriple.str(), CPU, targetFeatures, TargetOpts, Reloc::PIC_,
1064+
EffectiveTriple, CPU, targetFeatures, TargetOpts, Reloc::PIC_,
10651065
cmodel, OptLevel);
10661066
if (!TargetMachine) {
10671067
Ctx.Diags.diagnose(SourceLoc(), diag::no_llvm_target,

‎lib/IRGen/IRGenDebugInfo.cpp‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3706,10 +3706,11 @@ struct DbgIntrinsicEmitter {
37063706
const llvm::DILocation *DL,
37073707
llvm::Instruction *InsertBefore) {
37083708
if (ForceDbgDeclare == AddrDbgInstrKind::DbgDeclare)
3709-
return DIBuilder.insertDeclare(Addr, VarInfo, Expr, DL, InsertBefore);
3709+
return DIBuilder.insertDeclare(Addr, VarInfo, Expr, DL,
3710+
InsertBefore->getIterator());
37103711
Expr = llvm::DIExpression::append(Expr, llvm::dwarf::DW_OP_deref);
37113712
return DIBuilder.insertDbgValueIntrinsic(Addr, VarInfo, Expr, DL,
3712-
InsertBefore);
3713+
InsertBefore->getIterator());
37133714
}
37143715

37153716
llvm::DbgInstPtr insert(llvm::Value *Addr, llvm::DILocalVariable *VarInfo,

‎lib/IRGen/IRGenFunction.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -525,8 +525,8 @@ llvm::CallInst *IRBuilder::CreateNonMergeableTrap(IRGenModule &IGM,
525525
}
526526

527527
// Emit the trap instruction.
528-
llvm::Function *trapIntrinsic =
529-
llvm::Intrinsic::getDeclaration(&IGM.Module, llvm::Intrinsic::trap);
528+
llvm::Function *trapIntrinsic = llvm::Intrinsic::getOrInsertDeclaration(
529+
&IGM.Module, llvm::Intrinsic::trap);
530530
if (EnableTrapDebugInfo && IGM.DebugInfo && !failureMsg.empty()) {
531531
IGM.DebugInfo->addFailureMessageToCurrentLoc(*this, failureMsg);
532532
}

‎lib/IRGen/IRGenSIL.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -823,7 +823,7 @@ class IRGenSILFunction :
823823
if (DVI->getParent() == BB)
824824
IGM.DebugInfo->getBuilder().insertDbgValueIntrinsic(
825825
DVI->getValue(), DVI->getVariable(), DVI->getExpression(),
826-
DVI->getDebugLoc(), &*CurBB->getFirstInsertionPt());
826+
DVI->getDebugLoc(), CurBB->getFirstInsertionPt());
827827
}
828828
}
829829
}
@@ -907,7 +907,7 @@ class IRGenSILFunction :
907907

908908
llvm::Instruction *Cloned = Orig->clone();
909909
Cloned->setOperand(0, Inner);
910-
Cloned->insertBefore(Orig);
910+
Cloned->insertBefore(Orig->getIterator());
911911
return static_cast<llvm::Value *>(Cloned);
912912
};
913913
if (auto *LdInst = dyn_cast<llvm::LoadInst>(Storage))
@@ -5762,7 +5762,7 @@ static Address isSafeForMemCpyPeephole(const TypeInfo &TI, SILArgument *arg,
57625762
return Address();
57635763
}
57645764

5765-
lifetimeBegin->moveBefore(load);
5765+
lifetimeBegin->moveBefore(load->getIterator());
57665766

57675767
// Set insertPt to the first load such that we are within the lifetime of the
57685768
// alloca marked by the lifetime intrinsic.

‎lib/LLVMPasses/LLVMARCOpts.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -398,7 +398,7 @@ static bool performLocalReleaseMotion(CallInst &Release, BasicBlock &BB,
398398
// there) move the release to the top of the block.
399399
// TODO: This is where we'd plug in some global algorithms someday.
400400
if (&*BBI != &Release) {
401-
Release.moveBefore(&*BBI);
401+
Release.moveBefore(BBI);
402402
return true;
403403
}
404404

@@ -520,7 +520,7 @@ static bool performLocalRetainMotion(CallInst &Retain, BasicBlock &BB,
520520
// If we were able to move the retain down, move it now.
521521
// TODO: This is where we'd plug in some global algorithms someday.
522522
if (MadeProgress) {
523-
Retain.moveBefore(&*BBI);
523+
Retain.moveBefore(BBI);
524524
return true;
525525
}
526526

‎lib/LLVMPasses/LLVMMergeFunctions.cpp‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1046,8 +1046,9 @@ void SwiftMergeFunctions::replaceCallWithAddedPtrAuth(CallInst *origCall,
10461046
copiedArgs.push_back(op);
10471047
}
10481048

1049-
auto *newCall = CallInst::Create(origCall->getFunctionType(),
1050-
newCallee, copiedArgs, bundles, origCall->getName(), origCall);
1049+
auto *newCall =
1050+
CallInst::Create(origCall->getFunctionType(), newCallee, copiedArgs,
1051+
bundles, origCall->getName(), origCall->getIterator());
10511052
newCall->setAttributes(origCall->getAttributes());
10521053
newCall->setTailCallKind(origCall->getTailCallKind());
10531054
newCall->setCallingConv(origCall->getCallingConv());

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