@@ -437,6 +437,8 @@ bool swift::isLetAddress(SILValue address) {
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// ===----------------------------------------------------------------------===//
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bool swift::mayAccessPointer (SILInstruction *instruction) {
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+ assert (!FullApplySite::isa (instruction) && !isa<EndApplyInst>(instruction) &&
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+ !isa<AbortApplyInst>(instruction));
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if (!instruction->mayReadOrWriteMemory ())
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return false ;
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if (isa<BuiltinInst>(instruction)) {
@@ -455,6 +457,11 @@ bool swift::mayAccessPointer(SILInstruction *instruction) {
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}
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bool swift::mayLoadWeakOrUnowned (SILInstruction *instruction) {
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+ assert (!FullApplySite::isa (instruction) && !isa<EndApplyInst>(instruction) &&
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+ !isa<AbortApplyInst>(instruction));
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+ if (isa<BuiltinInst>(instruction)) {
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+ return instruction->mayReadOrWriteMemory ();
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+ }
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return isa<LoadWeakInst>(instruction)
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|| isa<LoadUnownedInst>(instruction)
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|| isa<StrongCopyUnownedValueInst>(instruction)
@@ -463,17 +470,23 @@ bool swift::mayLoadWeakOrUnowned(SILInstruction *instruction) {
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// / Conservatively, whether this instruction could involve a synchronization
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// / point like a memory barrier, lock or syscall.
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- bool swift::maySynchronizeNotConsideringSideEffects (SILInstruction *instruction) {
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- return FullApplySite::isa (instruction)
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- || isa<EndApplyInst>(instruction)
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- || isa<AbortApplyInst>(instruction)
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- || isa<HopToExecutorInst>(instruction);
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+ bool swift::maySynchronize (SILInstruction *instruction) {
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+ assert (!FullApplySite::isa (instruction) && !isa<EndApplyInst>(instruction) &&
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+ !isa<AbortApplyInst>(instruction));
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+ if (isa<BuiltinInst>(instruction)) {
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+ return instruction->mayReadOrWriteMemory ();
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+ }
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+ return isa<HopToExecutorInst>(instruction);
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}
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bool swift::mayBeDeinitBarrierNotConsideringSideEffects (SILInstruction *instruction) {
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+ if (FullApplySite::isa (instruction) || isa<EndApplyInst>(instruction) ||
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+ isa<AbortApplyInst>(instruction)) {
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+ return true ;
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+ }
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bool retval = mayAccessPointer (instruction)
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|| mayLoadWeakOrUnowned (instruction)
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- || maySynchronizeNotConsideringSideEffects (instruction);
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+ || maySynchronize (instruction);
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assert (!retval || !isa<BranchInst>(instruction) && " br as deinit barrier!?" );
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return retval;
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}
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