@@ -14,7 +14,7 @@ protocol ShiftedVReg {
1414
1515/// A larger (32-bit) version of `VReg`
1616/// Used to utilize halfword loads instructions.
17- struct LVReg : Equatable , ShiftedVReg {
17+ struct LVReg : Equatable , ShiftedVReg , CustomStringConvertible {
1818 let value : Int32
1919
2020 init ( _ value: VReg ) {
@@ -26,11 +26,15 @@ struct LVReg: Equatable, ShiftedVReg {
2626 init ( storage: Int32 ) {
2727 self . value = storage
2828 }
29+
30+ var description : String {
31+ " \( value / Int32( MemoryLayout< StackSlot> . size) ) "
32+ }
2933}
3034
3135/// A larger (64-bit) version of `VReg`
3236/// Used to utilize word loads instructions.
33- struct LLVReg : Equatable , ShiftedVReg {
37+ struct LLVReg : Equatable , ShiftedVReg , CustomStringConvertible {
3438 let value : Int64
3539
3640 init ( _ value: VReg ) {
@@ -42,6 +46,10 @@ struct LLVReg: Equatable, ShiftedVReg {
4246 init ( storage: Int64 ) {
4347 self . value = storage
4448 }
49+
50+ var description : String {
51+ " \( value / Int64( MemoryLayout< StackSlot> . size) ) "
52+ }
4553}
4654
4755// MARK: - Immediate load/emit support
@@ -238,8 +246,7 @@ struct InstructionPrintingContext {
238246 return " reg: \( reg) "
239247 }
240248 }
241- func reg( _ x: LVReg ) -> String { reg ( x. value) }
242- func reg( _ x: LLVReg ) -> String { reg ( x. value) }
249+ func reg< R: ShiftedVReg > ( _ x: R ) -> String { reg ( Int ( x. value) / MemoryLayout< StackSlot> . size) }
243250
244251 func offset( _ offset: UInt64 ) -> String {
245252 " offset: \( offset) "
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