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SIL optimizer: fix two non-deterministic behaviors
The problem was again iterating over pointer sets. This produced non-deterministic use list orderings, which does result in non-deterministic code generation itself. But somehow debug info generation depends on the use list ordering (which should be investigated why). And the non-deterministic debug info changes triggered re-running of the llvm pipeline.
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-3
lines changed

2 files changed

+5
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lib/SILOptimizer/Transforms/SILMem2Reg.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@ typedef llvm::DenseMap<DomTreeNode *, unsigned> DomTreeLevelMap;
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/// Promotes a single AllocStackInst into registers..
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class StackAllocationPromoter {
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typedef llvm::DenseSet<SILBasicBlock *> BlockSet;
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typedef llvm::SmallSetVector<SILBasicBlock *, 16> BlockSet;
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typedef llvm::DenseMap<SILBasicBlock *, SILInstruction *> BlockToInstMap;
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// Use a priority queue keyed on dominator tree level so that inserted nodes
@@ -794,7 +794,7 @@ void StackAllocationPromoter::promoteAllocationToPhi() {
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// The successor node is a new PHINode. If this is a new PHI node
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// then it may require additional definitions, so add it to the PQ.
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if (PhiBlocks.insert(Succ).second)
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if (PhiBlocks.insert(Succ))
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PQ.push(std::make_pair(SuccNode, SuccLevel));
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}
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lib/SILOptimizer/Transforms/SimplifyCFG.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2530,7 +2530,9 @@ static void removeArgument(SILBasicBlock *BB, unsigned i) {
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// Determine the set of predecessors in case any predecessor has
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// two edges to this block (e.g. a conditional branch where both
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// sides reach this block).
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llvm::SmallPtrSet<SILBasicBlock *, 4> PredBBs;
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llvm::SetVector<SILBasicBlock *,SmallVector<SILBasicBlock *, 8>,
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SmallPtrSet<SILBasicBlock *, 8>> PredBBs;
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for (auto *Pred : BB->getPredecessorBlocks())
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PredBBs.insert(Pred);
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