IRGen: CHECK => CHECK-SAME

Author: slavapestov

test/IRGen/dynamic_replaceable.sil

@@ -8,19 +8,19 @@
 // CHECK: @test_replacementTX = global %swift.dyn_repl_link_entry zeroinitializer
 
 // CHECK: @"\01l_unnamed_dynamic_replacements" = private constant { i32, i32, [1 x { i32, i32, i32, i32 }] }
-// CHECK: { i32 0,
-// CHECK:   i32 1,
-// CHECK:  [1 x { i32, i32, i32, i32 }]
-// CHECK:  [{ i32, i32, i32, i32 }
-// CHECK:  %swift.dyn_repl_key* @test_dynamically_replaceableTx
-// CHECK:  @test_replacement
-// CHECK:  %swift.dyn_repl_link_entry* @test_replacementTX
-// CHECK:  i32 0 }] }, section "__TEXT,__const"
+// CHECK-SAME: { i32 0,
+// CHECK-SAME:   i32 1,
+// CHECK-SAME:  [1 x { i32, i32, i32, i32 }]
+// CHECK-SAME:  [{ i32, i32, i32, i32 }
+// CHECK-SAME:  %swift.dyn_repl_key* @test_dynamically_replaceableTx
+// CHECK-SAME:  @test_replacement
+// CHECK-SAME:  %swift.dyn_repl_link_entry* @test_replacementTX
+// CHECK-SAME:  i32 0 }] }, section "__TEXT,__const"
 
 // CHECK: @"\01l_auto_dynamic_replacements" = private constant { i32, i32, [2 x i32] }
-// CHECK: { i32 0, i32 1,
-// CHECK: [2 x i32] [{{.*}}@"\01l_unnamed_dynamic_replacements"{{.*}}, i32 0]
-// CHECK: }, section "__TEXT, __swift5_replace, regular, no_dead_strip"
+// CHECK-SAME: { i32 0, i32 1,
+// CHECK-SAME: [2 x i32] [{{.*}}@"\01l_unnamed_dynamic_replacements"{{.*}}, i32 0]
+// CHECK-SAME: }, section "__TEXT, __swift5_replace, regular, no_dead_strip"
 
 // CHECK-LABEL: define swiftcc void @test_dynamically_replaceable()
 // CHECK-NEXT: entry:

test/IRGen/dynamic_replaceable_opaque_return.swift

@@ -11,9 +11,9 @@
 // CHECK: @"$s1A3baryQrSiFQOMj" = constant %swift.dyn_repl_key { {{.*}}%swift.dyn_repl_link_entry* @"$s1A3baryQrSiFQOMk"{{.*}}, i32 0 }, section "__TEXT,__const"
 // CHECK: @"$s1A16_replacement_bar1yQrSi_tFQOMk" = global %swift.dyn_repl_link_entry zeroinitializer
 // CHECK: @"\01l_unnamed_dynamic_replacements" =
-// CHECK:   private constant { i32, i32, [4 x { i32, i32, i32, i32 }] }
-// CHECK:   { i32 0, i32 4, [4 x { i32, i32, i32, i32 }] [
-// CHECK:     { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A3baryQrSiFTx"{{.*}}@"$s1A16_replacement_bar1yQrSi_tF"{{.*}}%swift.dyn_repl_link_entry* @"$s1A16_replacement_bar1yQrSi_tFTX"{{.*}}, i32 0 }, { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A9ContainerV4propQrvgTx"{{.*}}@"$s1A9ContainerV7_r_propQrvg"{{.*}}, i32 0 }, { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A3baryQrSiFQOMj"{{.*}},{{.*}}@"$s1A16_replacement_bar1yQrSi_tFQOMg"{{.*}},{{.*}}@"$s1A16_replacement_bar1yQrSi_tFQOMk"{{.*}}, i32 0 }, { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A9ContainerV4propQrvpQOMj"{{.*}},{{.*}}@"$s1A9ContainerV7_r_propQrvpQOMg"{{.*}},{{.*}}@"$s1A9ContainerV7_r_propQrvpQOMk"{{.*}}, i32 0 }] }
+// CHECK-SAME:   private constant { i32, i32, [4 x { i32, i32, i32, i32 }] }
+// CHECK-SAME:   { i32 0, i32 4, [4 x { i32, i32, i32, i32 }] [
+// CHECK-SAME:     { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A3baryQrSiFTx"{{.*}}@"$s1A16_replacement_bar1yQrSi_tF"{{.*}}%swift.dyn_repl_link_entry* @"$s1A16_replacement_bar1yQrSi_tFTX"{{.*}}, i32 0 }, { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A9ContainerV4propQrvgTx"{{.*}}@"$s1A9ContainerV7_r_propQrvg"{{.*}}, i32 0 }, { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A3baryQrSiFQOMj"{{.*}},{{.*}}@"$s1A16_replacement_bar1yQrSi_tFQOMg"{{.*}},{{.*}}@"$s1A16_replacement_bar1yQrSi_tFQOMk"{{.*}}, i32 0 }, { i32, i32, i32, i32 } { {{.*}}%swift.dyn_repl_key* @"$s1A9ContainerV4propQrvpQOMj"{{.*}},{{.*}}@"$s1A9ContainerV7_r_propQrvpQOMg"{{.*}},{{.*}}@"$s1A9ContainerV7_r_propQrvpQOMk"{{.*}}, i32 0 }] }
 // CHECK: , section "__TEXT,__const"
 
 public protocol P {