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lines changed Original file line number Diff line number Diff line change @@ -20,6 +20,10 @@ set(LLVM_ENABLE_ASSERTIONS YES CACHE BOOL "")
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set (ENABLE_X86_RELAX_RELOCATIONS YES CACHE BOOL "" )
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+ # NOTE(compnerd) we can hardcode the default target triple since the cache files
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+ # are target dependent.
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+ set (LLVM_DEFAULT_TARGET_TRIPLE x86_64-unknown-windows-msvc CACHE STRING "" )
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+
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set (LLVM_APPEND_VC_REV NO CACHE BOOL "" )
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set (LLVM_ENABLE_PER_TARGET_RUNTIME_DIR YES CACHE BOOL "" )
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set (LLVM_ENABLE_PYTHON YES CACHE BOOL "" )
@@ -39,6 +43,7 @@ foreach(target ${LLVM_RUNTIME_TARGETS})
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set (RUNTIMES_${target}_COMPILER_RT_BUILD_SANITIZERS NO CACHE BOOL "" )
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set (RUNTIMES_${target}_COMPILER_RT_BUILD_XRAY NO CACHE BOOL "" )
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endforeach ()
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+
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set (LLVM_TARGETS_TO_BUILD AArch64 ARM WebAssembly X86 CACHE STRING "" )
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# Disable certain targets to reduce the configure time or to avoid configuration
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