Merge pull request swiftlang#76045 from kubamracek/mergeable-traps

Add -Xfrontend -mergeable-traps as a way to emit mergeable traps

Author: kubamracek

SwiftCompilerSources/Sources/Optimizer/FunctionPasses/MergeCondFails.swift

@@ -39,10 +39,12 @@ private func runMergeCondFails(function: Function, context: FunctionPassContext)
 
     for inst in block.instructions {
       if let cfi = inst as? CondFailInst {
+        let messageIsSame = condFailToMerge.isEmpty || cfi.message == condFailToMerge.first!.message
+        let forceAllowMerge = context.options.enableMergeableTraps
+
         // Do not process arithmetic overflow checks. We typically generate more
         // efficient code with separate jump-on-overflow.
-        if !hasOverflowConditionOperand(cfi) &&
-           (condFailToMerge.isEmpty || cfi.message == condFailToMerge.first!.message) {
+        if !hasOverflowConditionOperand(cfi) && (messageIsSame || forceAllowMerge) {
           condFailToMerge.push(cfi)
         }
       } else if inst.mayHaveSideEffects || inst.mayReadFromMemory {

SwiftCompilerSources/Sources/Optimizer/PassManager/Options.swift

@@ -40,6 +40,10 @@ struct Options {
     _bridged.hasFeature(.Embedded)
   }
 
+  var enableMergeableTraps: Bool {
+    _bridged.enableMergeableTraps()
+  }
+
   func hasFeature(_ feature: BridgedFeature) -> Bool {
     _bridged.hasFeature(feature)
   }

include/swift/AST/IRGenOptions.h

@@ -540,6 +540,9 @@ class IRGenOptions {
   // variants.
   unsigned UseCoroCCArm64 : 1;
 
+  // Whether to emit mergeable or non-mergeable traps.
+  unsigned MergeableTraps : 1;
+
   /// The number of threads for multi-threaded code generation.
   unsigned NumThreads = 0;
 
@@ -646,6 +649,7 @@ class IRGenOptions {
         EmitAsyncFramePushPopMetadata(true), EmitTypeMallocForCoroFrame(false),
         AsyncFramePointerAll(false), UseProfilingMarkerThunks(false),
         UseCoroCCX8664(false), UseCoroCCArm64(false),
+        MergeableTraps(false),
         DebugInfoForProfiling(false), CmdArgs(),
         SanitizeCoverage(llvm::SanitizerCoverageOptions()),
         TypeInfoFilter(TypeInfoDumpFilter::All),

include/swift/AST/SILOptions.h

@@ -335,6 +335,9 @@ class SILOptions {
   /// Temporarily used to bootstrap the AddressableParameters feature.
   bool EnableAddressDependencies = true;
 
+  // Whether to allow merging traps and cond_fails.
+  bool MergeableTraps = false;
+
   SILOptions() {}
 
   /// Return a hash code of any components from these options that should

include/swift/Option/FrontendOptions.td

@@ -1401,6 +1401,10 @@ def disable_split_cold_code :
   Flag<["-"], "disable-split-cold-code">,
   HelpText<"Disable splitting of cold code when optimizing">;
 
+def mergeable_traps :
+  Flag<["-"], "mergeable-traps">,
+  HelpText<"Emit mergeable traps even in optimized builds">;
+
 def enable_new_llvm_pass_manager :
   Flag<["-"], "enable-new-llvm-pass-manager">,
   HelpText<"Enable the new llvm pass manager">;

include/swift/SILOptimizer/OptimizerBridging.h

@@ -376,6 +376,7 @@ struct BridgedPassContext {
 
   BRIDGED_INLINE bool useAggressiveReg2MemForCodeSize() const;
   BRIDGED_INLINE bool enableStackProtection() const;
+  BRIDGED_INLINE bool enableMergeableTraps() const;
   BRIDGED_INLINE bool hasFeature(BridgedFeature feature) const;
   BRIDGED_INLINE bool enableMoveInoutStackProtection() const;
   BRIDGED_INLINE AssertConfiguration getAssertConfiguration() const;

include/swift/SILOptimizer/OptimizerBridgingImpl.h

@@ -543,6 +543,11 @@ bool BridgedPassContext::enableStackProtection() const {
   return mod->getOptions().EnableStackProtection;
 }
 
+bool BridgedPassContext::enableMergeableTraps() const {
+  swift::SILModule *mod = invocation->getPassManager()->getModule();
+  return mod->getOptions().MergeableTraps;
+}
+
 bool BridgedPassContext::hasFeature(BridgedFeature feature) const {
   swift::SILModule *mod = invocation->getPassManager()->getModule();
   return mod->getASTContext().LangOpts.hasFeature((swift::Feature)feature);

lib/DriverTool/sil_opt_main.cpp

@@ -596,6 +596,10 @@ struct SILOptOptions {
   llvm::cl::opt<bool> EnableAddressDependencies = llvm::cl::opt<bool>(
       "enable-address-dependencies",
       llvm::cl::desc("Enable enforcement of lifetime dependencies on addressable values."));
+
+  llvm::cl::opt<bool> MergeableTraps = llvm::cl::opt<bool>(
+      "mergeable-traps",
+      llvm::cl::desc("Enable cond_fail merging."));
 };
 
 /// Regular expression corresponding to the value given in one of the
@@ -914,6 +918,7 @@ int sil_opt_main(ArrayRef<const char *> argv, void *MainAddr) {
       options.EnablePackMetadataStackPromotion;
 
   SILOpts.EnableAddressDependencies = options.EnableAddressDependencies;
+  SILOpts.MergeableTraps = options.MergeableTraps;
 
   if (options.OptModeFlag == OptimizationMode::NotSet) {
     if (options.OptimizationGroup == OptGroup::Diagnostics)

lib/Frontend/CompilerInvocation.cpp

@@ -3127,11 +3127,11 @@ static bool ParseSILArgs(SILOptions &Opts, ArgList &Args,
     Opts.ShouldFunctionsBePreservedToDebugger &=
         LTOKind.value() == IRGenLLVMLTOKind::None;
 
-  
-  Opts.EnableAddressDependencies =
+    Opts.EnableAddressDependencies =
     Args.hasFlag(OPT_enable_address_dependencies,
                  OPT_disable_address_dependencies,
                  Opts.EnableAddressDependencies);
+  Opts.MergeableTraps = Args.hasArg(OPT_mergeable_traps);
 
   return false;
 }
@@ -3800,6 +3800,8 @@ static bool ParseIRGenArgs(IRGenOptions &Opts, ArgList &Args,
     return true;
   }
 
+  Opts.MergeableTraps = Args.hasArg(OPT_mergeable_traps);
+
   Opts.EnableObjectiveCProtocolSymbolicReferences =
     Args.hasFlag(OPT_enable_objective_c_protocol_symbolic_references,
                  OPT_disable_objective_c_protocol_symbolic_references,

lib/IRGen/IRGenFunction.cpp

@@ -503,7 +503,7 @@ llvm::CallInst *IRBuilder::CreateNonMergeableTrap(IRGenModule &IGM,
     }
   }
 
-  if (IGM.IRGen.Opts.shouldOptimize()) {
+  if (IGM.IRGen.Opts.shouldOptimize() && !IGM.IRGen.Opts.MergeableTraps) {
     // Emit unique side-effecting inline asm calls in order to eliminate
     // the possibility that an LLVM optimization or code generation pass
     // will merge these blocks back together again. We emit an empty asm