Merge pull request swiftlang#29631 from CodaFi/irgen-bru

CodaFi · web-flow · commit 91a5ceb56cf3 · 2020-03-16T21:07:53.000-07:00
IRGen Requests
diff --git a/include/swift/AST/IRGenRequests.h b/include/swift/AST/IRGenRequests.h
@@ -0,0 +1,175 @@
+//===--- IRGenRequests.h - IRGen Requests -----------------------*- C++ -*-===//
+//
+// This source file is part of the Swift.org open source project
+//
+// Copyright (c) 2020 Apple Inc. and the Swift project authors
+// Licensed under Apache License v2.0 with Runtime Library Exception
+//
+// See https://swift.org/LICENSE.txt for license information
+// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
+//
+//===----------------------------------------------------------------------===//
+//
+//  This file defines IRGen requests.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SWIFT_IRGen_REQUESTS_H
+#define SWIFT_IRGen_REQUESTS_H
+
+#include "swift/AST/ASTTypeIDs.h"
+#include "swift/AST/SimpleRequest.h"
+#include "swift/Basic/PrimarySpecificPaths.h"
+#include "llvm/ADT/StringSet.h"
+
+namespace swift {
+class SourceFile;
+class IRGenOptions;
+class SILModule;
+
+namespace irgen {
+  class IRGenModule;
+};
+
+}; // namespace swift
+
+namespace llvm {
+class GlobalVariable;
+class LLVMContext;
+class Module;
+}; // namespace llvm
+
+namespace swift {
+
+struct IRGenDescriptor {
+  const IRGenOptions &Opts;
+  llvm::PointerUnion<ModuleDecl *, SourceFile *> Ctx;
+  SILModule *SILMod;
+  StringRef ModuleName;
+  const PrimarySpecificPaths &PSPs;
+  StringRef PrivateDiscriminator;
+  llvm::LLVMContext &LLVMContext;
+  ArrayRef<std::string> parallelOutputFilenames;
+  llvm::GlobalVariable **outModuleHash;
+  llvm::StringSet<> *LinkerDirectives;
+
+  friend llvm::hash_code hash_value(const IRGenDescriptor &owner) {
+    return llvm::hash_combine(owner.Ctx);
+  }
+
+  friend bool operator==(const IRGenDescriptor &lhs,
+                         const IRGenDescriptor &rhs) {
+    return lhs.Ctx == rhs.Ctx;
+  }
+
+  friend bool operator!=(const IRGenDescriptor &lhs,
+                         const IRGenDescriptor &rhs) {
+    return !(lhs == rhs);
+  }
+
+public:
+  static IRGenDescriptor
+  forFile(const IRGenOptions &Opts, SourceFile &SF,
+          std::unique_ptr<SILModule> &&SILMod, StringRef ModuleName,
+          const PrimarySpecificPaths &PSPs, StringRef PrivateDiscriminator,
+          llvm::LLVMContext &LLVMContext, llvm::GlobalVariable **outModuleHash,
+          llvm::StringSet<> *LinkerDirectives) {
+    return IRGenDescriptor{Opts,
+                           &SF,
+                           SILMod.release(),
+                           ModuleName,
+                           PSPs,
+                           PrivateDiscriminator,
+                           LLVMContext,
+                           {},
+                           outModuleHash,
+                           LinkerDirectives};
+  }
+
+  static IRGenDescriptor
+  forWholeModule(const IRGenOptions &Opts, swift::ModuleDecl *M,
+                 std::unique_ptr<SILModule> &&SILMod, StringRef ModuleName,
+                 const PrimarySpecificPaths &PSPs,
+                 llvm::LLVMContext &LLVMContext,
+                 ArrayRef<std::string> parallelOutputFilenames,
+                 llvm::GlobalVariable **outModuleHash,
+                 llvm::StringSet<> *LinkerDirectives) {
+    return IRGenDescriptor{Opts,
+                           M,
+                           SILMod.release(),
+                           ModuleName,
+                           PSPs,
+                           "",
+                           LLVMContext,
+                           parallelOutputFilenames,
+                           outModuleHash,
+                           LinkerDirectives};
+  }
+};
+
+/// Report that a request of the given kind is being evaluated, so it
+/// can be recorded by the stats reporter.
+template<typename Request>
+void reportEvaluatedRequest(UnifiedStatsReporter &stats,
+                            const Request &request);
+
+class IRGenSourceFileRequest
+    : public SimpleRequest<IRGenSourceFileRequest,
+                           std::unique_ptr<llvm::Module>(IRGenDescriptor),
+                           CacheKind::Uncached> {
+public:
+  using SimpleRequest::SimpleRequest;
+
+private:
+  friend SimpleRequest;
+
+  // Evaluation.
+  llvm::Expected<std::unique_ptr<llvm::Module>>
+  evaluate(Evaluator &evaluator, IRGenDescriptor desc) const;
+
+public:
+  bool isCached() const { return true; }
+};
+
+class IRGenWholeModuleRequest
+    : public SimpleRequest<IRGenWholeModuleRequest,
+                           std::unique_ptr<llvm::Module>(IRGenDescriptor),
+                           CacheKind::Uncached> {
+public:
+  using SimpleRequest::SimpleRequest;
+
+private:
+  friend SimpleRequest;
+
+  // Evaluation.
+  llvm::Expected<std::unique_ptr<llvm::Module>>
+  evaluate(Evaluator &evaluator, IRGenDescriptor desc) const;
+
+public:
+  bool isCached() const { return true; }
+};
+
+void simple_display(llvm::raw_ostream &out, const IRGenDescriptor &d);
+
+SourceLoc extractNearestSourceLoc(const IRGenDescriptor &desc);
+
+/// The zone number for IRGen.
+#define SWIFT_TYPEID_ZONE IRGen
+#define SWIFT_TYPEID_HEADER "swift/AST/IRGenTypeIDZone.def"
+#include "swift/Basic/DefineTypeIDZone.h"
+#undef SWIFT_TYPEID_ZONE
+#undef SWIFT_TYPEID_HEADER
+
+ // Set up reporting of evaluated requests.
+#define SWIFT_REQUEST(Zone, RequestType, Sig, Caching, LocOptions)             \
+template<>                                                                     \
+inline void reportEvaluatedRequest(UnifiedStatsReporter &stats,                \
+                            const RequestType &request) {                      \
+  ++stats.getFrontendCounters().RequestType;                                   \
+}
+#include "swift/AST/IRGenTypeIDZone.def"
+#undef SWIFT_REQUEST
+
+} // end namespace swift
+
+#endif // SWIFT_IRGen_REQUESTS_H
diff --git a/include/swift/AST/IRGenTypeIDZone.def b/include/swift/AST/IRGenTypeIDZone.def
@@ -0,0 +1,23 @@
+//===--- IRGenTypeIDZone.def ------------------------------------*- C++ -*-===//
+//
+// This source file is part of the Swift.org open source project
+//
+// Copyright (c) 2020 Apple Inc. and the Swift project authors
+// Licensed under Apache License v2.0 with Runtime Library Exception
+//
+// See https://swift.org/LICENSE.txt for license information
+// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
+//
+//===----------------------------------------------------------------------===//
+//
+//  This definition file describes the requests in IRGen's zone.
+//
+//===----------------------------------------------------------------------===//
+
+SWIFT_REQUEST(IRGen, IRGenSourceFileRequest,
+              std::unique_ptr<llvm::Module>(IRGenDescriptor),
+              Uncached, NoLocationInfo)
+SWIFT_REQUEST(IRGen, IRGenWholeModuleRequest,
+              std::unique_ptr<llvm::Module>(IRGenDescriptor),
+              Uncached, NoLocationInfo)
+
diff --git a/include/swift/Basic/Statistics.def b/include/swift/Basic/Statistics.def
@@ -290,6 +290,10 @@ FRONTEND_STATISTIC(SILModule, NumSILOptWitnessTables)
 FRONTEND_STATISTIC(SILModule, NumSILOptDefaultWitnessTables)
 FRONTEND_STATISTIC(SILModule, NumSILOptGlobalVariables)
 
+#define SWIFT_REQUEST(ZONE, NAME, Sig, Caching, LocOptions) FRONTEND_STATISTIC(IRGen, NAME)
+#include "swift/AST/IRGenTypeIDZone.def"
+#undef SWIFT_REQUEST
+
 /// The next 10 statistics count kinds of LLVM entities produced
 /// during the IRGen phase: globals, functions, aliases, ifuncs,
 /// named metadata, value and comdat symbols, basic blocks,
diff --git a/include/swift/Basic/TypeID.h b/include/swift/Basic/TypeID.h
@@ -40,6 +40,8 @@ enum class Zone : uint8_t {
   SILGen                  = 12,
   SILOptimizer            = 13,
   TBDGen                  = 14,
+  IRGen                   = 20,
+
   // N.B. This is not a formal zone and exists solely to support the unit tests.
   ArithmeticEvaluator     = 255,
 };
diff --git a/include/swift/Subsystems.h b/include/swift/Subsystems.h
@@ -373,6 +373,12 @@ namespace swift {
   /// should call this functions after forming the ASTContext.
   void registerTBDGenRequestFunctions(Evaluator &evaluator);
 
+  /// Register IRGen-level request functions with the evaluator.
+  ///
+  /// Clients that form an ASTContext and will perform any IR generation
+  /// should call this functions after forming the ASTContext.
+  void registerIRGenRequestFunctions(Evaluator &evaluator);
+
   /// Register IDE-level request functions with the evaluator.
   ///
   /// The ASTContext will automatically call these upon construction.
diff --git a/lib/Frontend/Frontend.cpp b/lib/Frontend/Frontend.cpp
@@ -223,7 +223,8 @@ bool CompilerInstance::setUpASTContextIfNeeded() {
   registerSILGenRequestFunctions(Context->evaluator);
   registerSILOptimizerRequestFunctions(Context->evaluator);
   registerTBDGenRequestFunctions(Context->evaluator);
-
+  registerIRGenRequestFunctions(Context->evaluator);
+  
   // Migrator, indexing and typo correction need some IDE requests.
   // The integrated REPL needs IDE requests for completion.
   if (Invocation.getMigratorOptions().shouldRunMigrator() ||
diff --git a/lib/IRGen/CMakeLists.txt b/lib/IRGen/CMakeLists.txt
@@ -42,6 +42,7 @@ add_swift_host_library(swiftIRGen STATIC
   IRGenMangler.cpp
   IRGenModule.cpp
   IRGenSILPasses.cpp
+  IRGenRequests.cpp
   IRGenSIL.cpp
   Linking.cpp
   LoadableByAddress.cpp
diff --git a/lib/IRGen/IRGen.cpp b/lib/IRGen/IRGen.cpp
@@ -18,6 +18,7 @@
 #include "IRGenModule.h"
 #include "swift/AST/DiagnosticsIRGen.h"
 #include "swift/AST/IRGenOptions.h"
+#include "swift/AST/IRGenRequests.h"
 #include "swift/AST/LinkLibrary.h"
 #include "swift/AST/ProtocolConformance.h"
 #include "swift/Basic/Defer.h"
@@ -968,7 +969,7 @@ performIRGeneration(const IRGenOptions &Opts, ModuleDecl *M,
 
   // Run SIL level IRGen preparation passes.
   runIRGenPreparePasses(*SILMod, IGM);
-  
+
   {
     FrontendStatsTracer tracer(Ctx.Stats, "IRGen");
 
@@ -1353,25 +1354,36 @@ static void performParallelIRGeneration(
 }
 
 std::unique_ptr<llvm::Module> swift::performIRGeneration(
-    const IRGenOptions &Opts, swift::ModuleDecl *M, std::unique_ptr<SILModule> SILMod,
-    StringRef ModuleName, const PrimarySpecificPaths &PSPs,
-    llvm::LLVMContext &LLVMContext,
+    const IRGenOptions &Opts, swift::ModuleDecl *M,
+    std::unique_ptr<SILModule> SILMod, StringRef ModuleName,
+    const PrimarySpecificPaths &PSPs, llvm::LLVMContext &LLVMContext,
     ArrayRef<std::string> parallelOutputFilenames,
-    llvm::GlobalVariable **outModuleHash,
-    llvm::StringSet<> *LinkerDirectives) {
-  if (SILMod->getOptions().shouldPerformIRGenerationInParallel() &&
-      !parallelOutputFilenames.empty()) {
-    auto NumThreads = SILMod->getOptions().NumThreads;
-    ::performParallelIRGeneration(Opts, M, std::move(SILMod), ModuleName,
-                                  NumThreads, parallelOutputFilenames,
-                                  LinkerDirectives);
+    llvm::GlobalVariable **outModuleHash, llvm::StringSet<> *LinkerDirectives) {
+  auto desc = IRGenDescriptor::forWholeModule(
+      Opts, M, std::move(SILMod), ModuleName, PSPs, LLVMContext,
+      parallelOutputFilenames, outModuleHash, LinkerDirectives);
+  return llvm::cantFail(
+      M->getASTContext().evaluator(IRGenWholeModuleRequest{desc}));
+}
+
+llvm::Expected<std::unique_ptr<llvm::Module>>
+IRGenWholeModuleRequest::evaluate(Evaluator &evaluator,
+                                  IRGenDescriptor desc) const {
+  auto *M = desc.Ctx.get<ModuleDecl *>();
+  if (desc.SILMod->getOptions().shouldPerformIRGenerationInParallel() &&
+      !desc.parallelOutputFilenames.empty()) {
+    const auto NumThreads = desc.SILMod->getOptions().NumThreads;
+    ::performParallelIRGeneration(
+        desc.Opts, M, std::unique_ptr<SILModule>(desc.SILMod), desc.ModuleName,
+        NumThreads, desc.parallelOutputFilenames, desc.LinkerDirectives);
     // TODO: Parallel LLVM compilation cannot be used if a (single) module is
     // needed as return value.
     return nullptr;
   }
-  return ::performIRGeneration(Opts, M, std::move(SILMod), ModuleName, PSPs,
-                               "", LLVMContext, nullptr,
-                               outModuleHash, LinkerDirectives);
+  return ::performIRGeneration(
+      desc.Opts, M, std::unique_ptr<SILModule>(desc.SILMod), desc.ModuleName,
+      desc.PSPs, "", desc.LLVMContext, nullptr, desc.outModuleHash,
+      desc.LinkerDirectives);
 }
 
 std::unique_ptr<llvm::Module> swift::
@@ -1382,10 +1394,21 @@ performIRGeneration(const IRGenOptions &Opts, SourceFile &SF,
                     llvm::LLVMContext &LLVMContext,
                     llvm::GlobalVariable **outModuleHash,
                     llvm::StringSet<> *LinkerDirectives) {
-  return ::performIRGeneration(Opts, SF.getParentModule(), std::move(SILMod),
-                               ModuleName, PSPs, PrivateDiscriminator,
-                               LLVMContext, &SF,
-                               outModuleHash, LinkerDirectives);
+  auto desc = IRGenDescriptor::forFile(Opts, SF, std::move(SILMod), ModuleName,
+                                       PSPs, PrivateDiscriminator, LLVMContext,
+                                       outModuleHash, LinkerDirectives);
+  return llvm::cantFail(
+      SF.getASTContext().evaluator(IRGenSourceFileRequest{desc}));
+}
+
+llvm::Expected<std::unique_ptr<llvm::Module>>
+IRGenSourceFileRequest::evaluate(Evaluator &evaluator,
+                                 IRGenDescriptor desc) const {
+  auto *SF = desc.Ctx.get<SourceFile *>();
+  return ::performIRGeneration(
+      desc.Opts, SF->getParentModule(), std::unique_ptr<SILModule>(desc.SILMod),
+      desc.ModuleName, desc.PSPs, desc.PrivateDiscriminator, desc.LLVMContext,
+      SF, desc.outModuleHash, desc.LinkerDirectives);
 }
 
 void
diff --git a/lib/IRGen/IRGenRequests.cpp b/lib/IRGen/IRGenRequests.cpp
