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[LV] Make test more robust by adding users of inductions.
The modified tests didn't have actual users of all inductions, making it trivial to eliminate them. Add users to make sure the inductions are actually used in the vectorized version.
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2 files changed

+46
-26
lines changed

2 files changed

+46
-26
lines changed

llvm/test/Transforms/LoopVectorize/X86/pr36524.ll

Lines changed: 20 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2,30 +2,44 @@
22

33
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
44

5-
define void @foo() {
5+
define void @foo(i64* %ptr, i32* %ptr.2) {
66
; CHECK-LABEL: @foo(
77
; CHECK: vector.body:
88
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY:%.*]] ]
99
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 2, i64 3, i64 4, i64 5>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
10+
; CHECK-NEXT: [[VEC_IND_TRUNC:%.+]] = phi <4 x i32> [ <i32 2, i32 3, i32 4, i32 5>, %vector.ph ], [ [[VEC_IND_TRUNC_NEXT:%.+]], %vector.body ]
11+
; CHECK-NEXT: = add i64 [[INDEX]], 0
1012
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 2, [[INDEX]]
11-
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 0
12-
; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 1
13-
; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 2
14-
; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 3
13+
; CHECK-NEXT: [[TRUNC:%.+]] = trunc i64 [[OFFSET_IDX]] to i32
14+
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TRUNC]], 0
15+
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TRUNC]], 1
16+
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TRUNC]], 2
17+
; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TRUNC]], 3
18+
; CHECK-NEXT: store i32 [[TMP7]], i32* %ptr.2, align 4
19+
; CHECK-NEXT: store i32 [[TMP8]], i32* %ptr.2, align 4
20+
; CHECK-NEXT: store i32 [[TMP9]], i32* %ptr.2, align 4
21+
; CHECK-NEXT: store i32 [[TMP10]], i32* %ptr.2, align 4
22+
; CHECK: store <4 x i64> [[VEC_IND]]
1523
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
1624
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], <i64 4, i64 4, i64 4, i64 4>
25+
; CHECK-NEXT: [[VEC_IND_TRUNC_NEXT]] = add <4 x i32> [[VEC_IND_TRUNC]], <i32 4, i32 4, i32 4, i32 4>
1726
; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], 80
18-
; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !0
27+
; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]]
1928
;
2029
entry:
2130
br label %loop
2231

2332
loop:
33+
%can.iv = phi i64 [ 0, %entry ], [ %can.iv.next, %loop ]
2434
%0 = phi i64 [ 2, %entry ], [ %3, %loop ]
2535
%1 = and i64 %0, 4294967295
2636
%2 = trunc i64 %0 to i32
37+
store i32 %2, i32* %ptr.2
38+
%gep.ptr = getelementptr inbounds i64, i64* %ptr, i64 %can.iv
39+
store i64 %0, i64* %gep.ptr
2740
%3 = add nuw nsw i64 %1, 1
2841
%4 = icmp sgt i32 %2, 80
42+
%can.iv.next = add nuw nsw i64 %can.iv, 1
2943
br i1 %4, label %exit, label %loop
3044

3145
exit:

llvm/test/Transforms/LoopVectorize/pr35773.ll

Lines changed: 26 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,31 @@
11
; RUN: opt -S -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 < %s 2>&1 | FileCheck %s
2+
23
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
3-
@a = common local_unnamed_addr global i32 0, align 4
44
@b = common local_unnamed_addr global i8 0, align 1
55

6-
; Function Attrs: norecurse nounwind uwtable
7-
define void @doit1() local_unnamed_addr{
6+
define void @doit1(i32* %ptr) {
7+
; CHECK-LABEL: @doit1(
8+
; CHECK: vector.body:
9+
; CHECK-NEXT: [[MAIN_IV:%.*]] = phi i32 [ 0, [[VECTOR_PH:%.*]] ], [ [[MAIN_IV_NEXT:%.*]], [[VECTOR_BODY:%.*]] ]
10+
; CHECK-NEXT: [[I8_IV:%.*]] = phi <4 x i8> [ zeroinitializer, [[VECTOR_PH]] ], [ [[I8_IV_NEXT:%.*]], [[VECTOR_BODY]] ]
11+
; CHECK-NEXT: [[I32_IV:%.*]] = phi <4 x i32> [ <i32 0, i32 9, i32 18, i32 27>, [[VECTOR_PH]] ], [ [[I32_IV_NEXT:%.*]], [[VECTOR_BODY]] ]
12+
; CHECK-NEXT: [[IV_FROM_TRUNC:%.*]] = phi <4 x i8> [ <i8 0, i8 9, i8 18, i8 27>, [[VECTOR_PH]] ], [ [[IV_FROM_TRUNC_NEXT:%.*]], [[VECTOR_BODY]] ]
13+
14+
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[MAIN_IV]], 0
15+
16+
; CHECK-NEXT: [[I8_IV_NEXT]] = add <4 x i8> [[I8_IV]], [[IV_FROM_TRUNC]]
17+
18+
; CHECK-NEXT: [[GEP1:%.+]] = getelementptr inbounds i32, i32* %ptr, i32 [[TMP7]]
19+
; CHECK-NEXT: [[GEP2:%.+]] = getelementptr inbounds i32, i32* [[GEP1]], i32 0
20+
; CHECK-NEXT: [[GEP_BC:%.+]] = bitcast i32* [[GEP2]] to <4 x i32>*
21+
; CHECK-NEXT: store <4 x i32> [[I32_IV]], <4 x i32>* [[GEP_BC]], align 4
22+
23+
; CHECK-NEXT: [[MAIN_IV_NEXT]] = add nuw i32 [[MAIN_IV]], 4
24+
; CHECK-NEXT: [[I32_IV_NEXT]] = add <4 x i32> [[I32_IV]], <i32 36, i32 36, i32 36, i32 36>
25+
; CHECK-NEXT: [[IV_FROM_TRUNC_NEXT]] = add <4 x i8> [[IV_FROM_TRUNC]], <i8 36, i8 36, i8 36, i8 36>
26+
; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[MAIN_IV_NEXT]], 16
27+
; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !0
28+
;
829
entry:
930
br label %for.body
1031

@@ -17,30 +38,15 @@ for.body:
1738
%trunc.to.be.converted.to.new.iv = trunc i32 %i32.iv to i8
1839
%i8.add = add i8 %i8.iv, %trunc.to.be.converted.to.new.iv
1940

41+
%ptr.gep = getelementptr inbounds i32, i32* %ptr, i32 %main.iv
42+
store i32 %i32.iv, i32* %ptr.gep
2043
%noop.conv.under.pse = and i32 %i32.iv, 255
2144
%i32.add = add nuw nsw i32 %noop.conv.under.pse, 9
2245

2346
%inc = add i32 %main.iv, 1
2447
%tobool = icmp eq i32 %inc, 16
2548
br i1 %tobool, label %for.cond.for.end_crit_edge, label %for.body
2649

27-
; CHECK-LABEL: @doit1(
28-
; CHECK: vector.body:
29-
; CHECK-NEXT: [[MAIN_IV:%.*]] = phi i32 [ 0, [[VECTOR_PH:%.*]] ], [ [[MAIN_IV_NEXT:%.*]], [[VECTOR_BODY:%.*]] ]
30-
; CHECK-NEXT: [[I8_IV:%.*]] = phi <4 x i8> [ zeroinitializer, [[VECTOR_PH]] ], [ [[I8_IV_NEXT:%.*]], [[VECTOR_BODY]] ]
31-
; CHECK-NEXT: [[I32_IV:%.*]] = phi <4 x i32> [ <i32 0, i32 9, i32 18, i32 27>, [[VECTOR_PH]] ], [ [[I32_IV_NEXT:%.*]], [[VECTOR_BODY]] ]
32-
; CHECK-NEXT: [[IV_FROM_TRUNC:%.*]] = phi <4 x i8> [ <i8 0, i8 9, i8 18, i8 27>, [[VECTOR_PH]] ], [ [[IV_FROM_TRUNC_NEXT:%.*]], [[VECTOR_BODY]] ]
33-
34-
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[MAIN_IV]], 0
35-
36-
; CHECK-NEXT: [[I8_IV_NEXT]] = add <4 x i8> [[I8_IV]], [[IV_FROM_TRUNC]]
37-
38-
; CHECK-NEXT: [[MAIN_IV_NEXT]] = add nuw i32 [[MAIN_IV]], 4
39-
; CHECK-NEXT: [[I32_IV_NEXT]] = add <4 x i32> [[I32_IV]], <i32 36, i32 36, i32 36, i32 36>
40-
; CHECK-NEXT: [[IV_FROM_TRUNC_NEXT]] = add <4 x i8> [[IV_FROM_TRUNC]], <i8 36, i8 36, i8 36, i8 36>
41-
; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[MAIN_IV_NEXT]], 16
42-
; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !0
43-
4450
for.cond.for.end_crit_edge:
4551
store i8 %i8.add, i8* @b, align 1
4652
br label %for.end

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