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Simon Moll
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[VE] Fix VVP->VSC isel (inverted addr/data operands)
Reported by @saudet on github: #24 (comment)
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-25
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6 files changed

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‎llvm/lib/Target/VE/VVPInstrPatternsVec.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,10 +22,10 @@ defm : VectorGather<v256i32, v256i64, v256i1, "VGTLZX">;
2222
multiclass VectorScatter<ValueType DataVT, ValueType PtrVT, ValueType MaskVT, string SCPrefix> {
2323
// Unmasked.
2424
def : Pat<(vvp_scatter DataVT:$data, PtrVT:$addr, (MaskVT true_mask), i32:$avl),
25-
(!cast<Instruction>(SCPrefix#"vizvl") $data, 0, 0, $addr, $avl)>;
25+
(!cast<Instruction>(SCPrefix#"vizvl") $addr, 0, 0, $data, $avl)>;
2626
// Masked.
2727
def : Pat<(vvp_scatter DataVT:$data, PtrVT:$addr, MaskVT:$mask, i32:$avl),
28-
(!cast<Instruction>(SCPrefix#"vizvml") $data, 0, 0, $addr, $mask, $avl)>;
28+
(!cast<Instruction>(SCPrefix#"vizvml") $addr, 0, 0, $data, $mask, $avl)>;
2929
}
3030

3131
defm : VectorScatter<v256f64, v256i64, v256i1, "VSC">;

‎llvm/test/CodeGen/VE/Packed/vec_scatter_packed.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ define fastcc void @vec_scatter_v128f64(<128 x double*> %P, <128 x double> %D,<1
99
; CHECK: # %bb.0:
1010
; CHECK-NEXT: lea %s0, 128
1111
; CHECK-NEXT: lvl %s0
12-
; CHECK-NEXT: vsc %v0, %v1, 0, 0, %vm1
12+
; CHECK-NEXT: vsc %v1, %v0, 0, 0, %vm1
1313
; CHECK-NEXT: b.l.t (, %s10)
1414
call void @llvm.masked.scatter.v128f64.v128p0f64(<128 x double> %D, <128 x double*> %P, i32 16, <128 x i1> %M)
1515
ret void
@@ -21,7 +21,7 @@ define fastcc void @vec_scatter_v256f64(<256 x double*> %P, <256 x double> %D, <
2121
; CHECK: # %bb.0:
2222
; CHECK-NEXT: lea %s0, 256
2323
; CHECK-NEXT: lvl %s0
24-
; CHECK-NEXT: vsc %v0, %v1, 0, 0, %vm1
24+
; CHECK-NEXT: vsc %v1, %v0, 0, 0, %vm1
2525
; CHECK-NEXT: b.l.t (, %s10)
2626
call void @llvm.masked.scatter.v256f64.v256p0f64(<256 x double> %D, <256 x double*> %P, i32 16, <256 x i1> %M)
2727
ret void
@@ -35,8 +35,8 @@ define fastcc void @vec_scatter_v512f64(<512 x double*> %P, <512 x double> %D, <
3535
; CHECK: # %bb.0:
3636
; CHECK-NEXT: lea %s0, 256
3737
; CHECK-NEXT: lvl %s0
38-
; CHECK-NEXT: vsc %v0, %v2, 0, 0, %vm2
39-
; CHECK-NEXT: vsc %v1, %v3, 0, 0, %vm3
38+
; CHECK-NEXT: vsc %v2, %v0, 0, 0, %vm2
39+
; CHECK-NEXT: vsc %v3, %v1, 0, 0, %vm3
4040
; CHECK-NEXT: b.l.t (, %s10)
4141
call void @llvm.masked.scatter.v512f64.v512p0f64(<512 x double> %D, <512 x double*> %P, i32 16, <512 x i1> %M)
4242
ret void
@@ -50,9 +50,9 @@ define fastcc void @vec_scatter_v512f32(<512 x float*> %P, <512 x float> %D, <51
5050
; CHECK: # %bb.0:
5151
; CHECK-NEXT: lea %s0, 256
5252
; CHECK-NEXT: lvl %s0
53-
; CHECK-NEXT: vscu %v0, %v2, 0, 0, %vm2
53+
; CHECK-NEXT: vscu %v2, %v0, 0, 0, %vm2
5454
; CHECK-NEXT: vshf %v0, %v2, %v2, 4
55-
; CHECK-NEXT: vscu %v1, %v0, 0, 0, %vm3
55+
; CHECK-NEXT: vscu %v0, %v1, 0, 0, %vm3
5656
; CHECK-NEXT: b.l.t (, %s10)
5757
call void @llvm.masked.scatter.v512f32.v512p0f32(<512 x float> %D, <512 x float*> %P, i32 16, <512 x i1> %M)
5858
ret void

‎llvm/test/CodeGen/VE/Vector/vec_store.ll‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
12
; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=-packed,+vpu | FileCheck %s
23

34
; Function Attrs: nounwind
@@ -56,7 +57,7 @@ define fastcc void @vec_scatter_v128f64(<128 x double*> %P, <128 x double> %V, <
5657
; CHECK: # %bb.0:
5758
; CHECK-NEXT: lea %s0, 128
5859
; CHECK-NEXT: lvl %s0
59-
; CHECK-NEXT: vsc %v0, %v1, 0, 0, %vm1
60+
; CHECK-NEXT: vsc %v1, %v0, 0, 0, %vm1
6061
; CHECK-NEXT: b.l.t (, %s10)
6162
call void @llvm.masked.scatter.v128f64.v128p0f64(<128 x double> %V, <128 x double*> %P, i32 16, <128 x i1> %M)
6263
ret void
@@ -67,7 +68,7 @@ define fastcc void @vec_scatter_v256f64(<256 x double*> %P, <256 x double> %V, <
6768
; CHECK: # %bb.0:
6869
; CHECK-NEXT: lea %s0, 256
6970
; CHECK-NEXT: lvl %s0
70-
; CHECK-NEXT: vsc %v0, %v1, 0, 0, %vm1
71+
; CHECK-NEXT: vsc %v1, %v0, 0, 0, %vm1
7172
; CHECK-NEXT: b.l.t (, %s10)
7273
call void @llvm.masked.scatter.v256f64.v256p0f64(<256 x double> %V, <256 x double*> %P, i32 16, <256 x i1> %M)
7374
ret void

‎llvm/test/CodeGen/VE/Vector/vp-mem-v256i64-mask-avl-isel.ll‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -27,15 +27,15 @@ define fastcc void @test_vp_memory_i64(<256 x i64>* %VecPtr, <256 x i64*> %PtrVe
2727
; CHECK: # %bb.0:
2828
; CHECK-NEXT: lea %s16, 256
2929
; CHECK-NEXT: lvl %s16
30-
; CHECK-NEXT: vor %v2, (0)1, %v0
30+
; CHECK-NEXT: vor %v1, (0)1, %v0
3131
; CHECK-NEXT: and %s1, %s1, (32)0
3232
; CHECK-NEXT: # kill: def $sw1 killed $sw1 killed $sx1
3333
; CHECK-NEXT: lvl %s1
3434
; CHECK-NEXT: vseq %v0
3535
; CHECK-NEXT: vmulu.l %v0, 8, %v0, %vm1
3636
; CHECK-NEXT: vaddu.l %v0, %s0, %v0, %vm1
37-
; CHECK-NEXT: vgt %v1, %v0, 0, 0, %vm1
38-
; CHECK-NEXT: vgt %v0, %v2, 0, 0, %vm1
37+
; CHECK-NEXT: vgt %v2, %v0, 0, 0, %vm1
38+
; CHECK-NEXT: vgt %v0, %v1, 0, 0, %vm1
3939
; CHECK-NEXT: vsc %v2, %v1, 0, 0, %vm1
4040
; CHECK-NEXT: vst %v0, 8, %s0, %vm1
4141
; CHECK-NEXT: b.l.t (, %s10)
@@ -44,12 +44,12 @@ define fastcc void @test_vp_memory_i64(<256 x i64>* %VecPtr, <256 x i64*> %PtrVe
4444
; FAST: # %bb.0:
4545
; FAST-NEXT: lea %s16, 256
4646
; FAST-NEXT: lvl %s16
47-
; FAST-NEXT: vor %v2, (0)1, %v0
47+
; FAST-NEXT: vor %v1, (0)1, %v0
4848
; FAST-NEXT: and %s1, %s1, (32)0
4949
; FAST-NEXT: # kill: def $sw1 killed $sw1 killed $sx1
5050
; FAST-NEXT: lvl %s1
51-
; FAST-NEXT: vld %v1, 8, %s0
52-
; FAST-NEXT: vgt %v0, %v2, 0, 0, %vm1
51+
; FAST-NEXT: vld %v2, 8, %s0
52+
; FAST-NEXT: vgt %v0, %v1, 0, 0, %vm1
5353
; FAST-NEXT: vsc %v2, %v1, 0, 0, %vm1
5454
; FAST-NEXT: vst %v0, 8, %s0, %vm1
5555
; FAST-NEXT: b.l.t (, %s10)
@@ -65,15 +65,15 @@ define fastcc void @test_vp_memory_f64(<256 x double>* %VecPtr, <256 x double*>
6565
; CHECK: # %bb.0:
6666
; CHECK-NEXT: lea %s16, 256
6767
; CHECK-NEXT: lvl %s16
68-
; CHECK-NEXT: vor %v2, (0)1, %v0
68+
; CHECK-NEXT: vor %v1, (0)1, %v0
6969
; CHECK-NEXT: and %s1, %s1, (32)0
7070
; CHECK-NEXT: # kill: def $sw1 killed $sw1 killed $sx1
7171
; CHECK-NEXT: lvl %s1
7272
; CHECK-NEXT: vseq %v0
7373
; CHECK-NEXT: vmulu.l %v0, 8, %v0, %vm1
7474
; CHECK-NEXT: vaddu.l %v0, %s0, %v0, %vm1
75-
; CHECK-NEXT: vgt %v1, %v0, 0, 0, %vm1
76-
; CHECK-NEXT: vgt %v0, %v2, 0, 0, %vm1
75+
; CHECK-NEXT: vgt %v2, %v0, 0, 0, %vm1
76+
; CHECK-NEXT: vgt %v0, %v1, 0, 0, %vm1
7777
; CHECK-NEXT: vsc %v2, %v1, 0, 0, %vm1
7878
; CHECK-NEXT: vst %v0, 8, %s0, %vm1
7979
; CHECK-NEXT: b.l.t (, %s10)
@@ -82,12 +82,12 @@ define fastcc void @test_vp_memory_f64(<256 x double>* %VecPtr, <256 x double*>
8282
; FAST: # %bb.0:
8383
; FAST-NEXT: lea %s16, 256
8484
; FAST-NEXT: lvl %s16
85-
; FAST-NEXT: vor %v2, (0)1, %v0
85+
; FAST-NEXT: vor %v1, (0)1, %v0
8686
; FAST-NEXT: and %s1, %s1, (32)0
8787
; FAST-NEXT: # kill: def $sw1 killed $sw1 killed $sx1
8888
; FAST-NEXT: lvl %s1
89-
; FAST-NEXT: vld %v1, 8, %s0
90-
; FAST-NEXT: vgt %v0, %v2, 0, 0, %vm1
89+
; FAST-NEXT: vld %v2, 8, %s0
90+
; FAST-NEXT: vgt %v0, %v1, 0, 0, %vm1
9191
; FAST-NEXT: vsc %v2, %v1, 0, 0, %vm1
9292
; FAST-NEXT: vst %v0, 8, %s0, %vm1
9393
; FAST-NEXT: b.l.t (, %s10)

‎llvm/test/CodeGen/VE/Vector/vp-v256i32-mask-avl-isel.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -98,12 +98,12 @@ define fastcc void @test_vp_memory(<256 x i32>* %VecPtr, <256 x i32*> %PtrVec, <
9898
; CHECK: # %bb.0:
9999
; CHECK-NEXT: lea %s16, 256
100100
; CHECK-NEXT: lvl %s16
101-
; CHECK-NEXT: vor %v2, (0)1, %v0
101+
; CHECK-NEXT: vor %v1, (0)1, %v0
102102
; CHECK-NEXT: and %s1, %s1, (32)0
103103
; CHECK-NEXT: # kill: def $sw1 killed $sw1 killed $sx1
104104
; CHECK-NEXT: lvl %s1
105-
; CHECK-NEXT: vldl.zx %v1, 4, %s0
106-
; CHECK-NEXT: vgtl.zx %v0, %v2, 0, 0, %vm1
105+
; CHECK-NEXT: vldl.zx %v2, 4, %s0
106+
; CHECK-NEXT: vgtl.zx %v0, %v1, 0, 0, %vm1
107107
; CHECK-NEXT: vscl %v2, %v1, 0, 0, %vm1
108108
; CHECK-NEXT: vstl %v0, 4, %s0, %vm1
109109
; CHECK-NEXT: b.l.t (, %s10)

‎llvm/test/NOELLE/LoopInterchange/3d-2.ll‎

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