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SurfaceYellowDuckSurfaceYellowDuck
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add: clock constraints and dbg leds
implemented by Alexander Chuykov
1 parent 5158cee commit a6b62f8

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4 files changed

+50
-11
lines changed

4 files changed

+50
-11
lines changed

‎tang20k/scr1/tang20k_scr1.cst‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
//Part Number: GW2A-LV18PG256C8/I7
66
//Device: GW2A-18
77
//Device Version: C
8-
//Created Time: Tue 02 18 22:11:57 2025
8+
//Created Time: Thu 02 20 11:06:07 2025
99

1010
IO_LOC "UART_TX" M11;
1111
IO_PORT "UART_TX" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
@@ -17,27 +17,29 @@ IO_LOC "LED3" N14;
1717
IO_PORT "LED3" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
1818
IO_LOC "LED2" N16;
1919
IO_PORT "LED2" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
20-
IO_LOC "UART_RX" T13;
21-
IO_PORT "UART_RX" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
2220
IO_LOC "JTAG_TDO" M15;
2321
IO_PORT "JTAG_TDO" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
22+
IO_LOC "UART_RX" T13;
23+
IO_PORT "UART_RX" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
2424
IO_LOC "JTAG_TDI" R11;
2525
IO_PORT "JTAG_TDI" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
2626
IO_LOC "JTAG_TMS" J16;
2727
IO_PORT "JTAG_TMS" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
2828
IO_LOC "JTAG_TCK" P11;
29-
IO_PORT "JTAG_TCK" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
29+
IO_PORT "JTAG_TCK" IO_TYPE=LVCMOS33 PULL_MODE=DOWN BANK_VCCIO=3.3;
3030
IO_LOC "JTAG_TRST_N" T11;
3131
IO_PORT "JTAG_TRST_N" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
3232
IO_LOC "RESETn" T10;
3333
IO_PORT "RESETn" IO_TYPE=LVCMOS18 PULL_MODE=UP BANK_VCCIO=1.8;
3434
IO_LOC "CLK" H11;
3535
IO_PORT "CLK" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
36-
IO_LOC "BTN4" C7;
37-
IO_PORT "BTN4" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
3836
IO_LOC "BTN3" D7;
3937
IO_PORT "BTN3" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
4038
IO_LOC "BTN2" T2;
4139
IO_PORT "BTN2" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
40+
IO_LOC "BTN4" C7;
41+
IO_PORT "BTN4" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
4242
IO_LOC "BTN1" T3;
4343
IO_PORT "BTN1" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
44+
IO_LOC "D_OUT_T12" T12;
45+
IO_PORT "D_OUT_T12" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;

‎tang20k/scr1/tang20k_scr1.gprj‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,10 @@
88
<File path="./tang20k_scr1.sv" type="file.verilog" enable="1"/>
99
<File path="./tang20k_scr1.cst" type="file.cst" enable="1"/>
1010
<File path="./scr1_arch_custom.svh" type="file.other" enable="1"/>
11-
11+
<File path="tang20k_scr1.sdc" type="file.sdc" enable="1"/>
1212

1313
<File path="./ip/rom_bsram_memory/rom_bsram.sv" type="file.verilog" enable="1"/>
1414
<File path="./ip/ahb_slave_mux/ahb_slave_mux.sv" type="file.verilog" enable="1"/>
15-
1615

1716
<File path="./ip/ahb_lite_uart16550/src/ahb_lite_uart16550.v" type="file.verilog" enable="1"/>
1817
<File path="./ip/ahb_lite_uart16550/src/uart16550/raminfr.v" type="file.verilog" enable="1"/>

‎tang20k/scr1/tang20k_scr1.gprj.user‎

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
<?xml version="1" encoding="UTF-8"?>
2+
<!DOCTYPE ProjectUserData>
3+
<UserConfig>
4+
<Version>1.0</Version>
5+
<FlowState>
6+
<Process ID="Synthesis" State="2"/>
7+
<Process ID="Pnr" State="2"/>
8+
<Process ID="Gao" State="2"/>
9+
<Process ID="Rtl_Gao" State="2"/>
10+
<Process ID="Gvio" State="0"/>
11+
<Process ID="Place" State="2"/>
12+
</FlowState>
13+
<ResultFileList>
14+
<ResultFile ResultFileType="RES.netlist" ResultFilePath="impl/gwsynthesis/tang20k_scr1.vg"/>
15+
<ResultFile ResultFileType="RES.pnr.bitstream" ResultFilePath="impl/pnr/tang20k_scr1.fs"/>
16+
<ResultFile ResultFileType="RES.pnr.pin.rpt" ResultFilePath="impl/pnr/tang20k_scr1.pin.html"/>
17+
<ResultFile ResultFileType="RES.pnr.posp.bin" ResultFilePath="impl/pnr/tang20k_scr1.db"/>
18+
<ResultFile ResultFileType="RES.pnr.pwr.rpt" ResultFilePath="impl/pnr/tang20k_scr1.power.html"/>
19+
<ResultFile ResultFileType="RES.pnr.report" ResultFilePath="impl/pnr/tang20k_scr1.rpt.html"/>
20+
<ResultFile ResultFileType="RES.pnr.timing.paths" ResultFilePath="impl/pnr/tang20k_scr1.timing_paths"/>
21+
<ResultFile ResultFileType="RES.pnr.timing.rpt" ResultFilePath="impl/pnr/tang20k_scr1.tr.html"/>
22+
<ResultFile ResultFileType="RES.syn.report" ResultFilePath="impl/gwsynthesis/tang20k_scr1_syn.rpt.html"/>
23+
<ResultFile ResultFileType="RES.syn.resource" ResultFilePath="impl/gwsynthesis/tang20k_scr1_syn_rsc.xml"/>
24+
</ResultFileList>
25+
<Ui>000000ff00000001fd00000002000000000000029a00000167fc0200000001fc00000024000001670000009b01000014fa000000010200000003fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000006400fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000006000fffffffb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff0000008600ffffff00000003000005a000000157fc0100000001fc00000000000005a0000000b200fffffffa000000000100000002fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000004c00fffffffb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff000000b200ffffff000003050000016700000004000000040000000800000008fc000000010000000200000004000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e004500640069007401000000d1ffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c007301000001d2ffffffff0000000000000000000000280043006f00720065002e0054006f006f006c006200610072002e00500072006f006300650073007301000002bfffffffff0000000000000000</Ui>
26+
<FpUi>312e30313130000000ff00000000fd00000002000000000000008300000092fc0200000001fc0000002c000000920000008c00fffffffa000000000200000002fb0000001c0044006f0063006b00650072002e00530075006d006d0061007200790100000000ffffffff0000008c00fffffffb0000001c0044006f0063006b00650072002e004e00650074006c0069007300740000000000ffffffff0000005d00ffffff00000003000002d000000199fc0100000001fc00000000000002d0000001c100fffffffa00000001010000000bfb0000001c0044006f0063006b00650072002e004d0065007300730061006700650100000000ffffffff0000006200fffffffb0000002c0044006f0063006b00650072002e0049002f004f002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004900fffffffb000000380044006f0063006b00650072002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004900fffffffb000000300044006f0063006b00650072002e00470072006f00750070002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004900fffffffb000000360044006f0063006b00650072002e005200650073006f0075007200630065002e005200650073006500720076006100740069006f006e0100000000ffffffff0000004900fffffffb000000380044006f0063006b00650072002e0043006c006f0063006b002e004e00650074002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004900fffffffb000000420044006f0063006b00650072002e00470043004c004b002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004900fffffffb000000420044006f0063006b00650072002e00480043004c004b002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004900fffffffb000000440044006f0063006b00650072002e00470043004c004b0032002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730000000000ffffffff0000004900fffffffb000000460044006f0063006b00650072002e00480043004c004b00350041002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730000000000ffffffff0000004900fffffffb0000002e0044006f0063006b00650072002e0056007200650066002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004900ffffff0000024c0000009200000004000000040000000800000008fc000000010000000200000001000000180054006f006f006c004200610072002e00460069006c00650100000000ffffffff0000000000000000</FpUi>
27+
</UserConfig>

‎tang20k/scr1/tang20k_scr1.sv‎

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -26,13 +26,15 @@ module tang20k_scr1
2626
output logic LED3,
2727
output logic LED4,
2828
output logic LED5,
29+
output logic D_OUT_T12,
2930
input logic BTN0,
3031
input logic BTN1,
3132
input logic BTN2,
3233
input logic BTN3,
3334
input logic BTN4,
3435

3536
`ifdef SCR1_DBG_EN
37+
// input logic JTAG_SRST_N,
3638
input logic JTAG_TRST_N,
3739
input logic JTAG_TCK,
3840
input logic JTAG_TMS,
@@ -128,7 +130,7 @@ module tang20k_scr1
128130
// == == == == == == == == == == == == == == == == == == == == == == == == == == == =
129131
assign extn_rst_in_n = RESETn;
130132
assign cpu_clk = CLK;
131-
assign pwrup_rst_n = '1;
133+
assign pwrup_rst_n = RESETn;
132134

133135
always_ff @(posedge cpu_clk, negedge pwrup_rst_n)
134136
begin
@@ -286,15 +288,24 @@ module tang20k_scr1
286288
assign jtag_tck = JTAG_TCK;
287289
assign jtag_tms = JTAG_TMS;
288290
assign jtag_tdi = JTAG_TDI;
289-
assign JTAG_TDO = (jtag_tdo_en) ? jtag_tdo : 1'bZ;
290-
assign LED5 = 1'b0;
291+
assign JTAG_TDO = (jtag_tdo_en == 1'b1) ? jtag_tdo : 1'bZ;;
292+
293+
assign LED2 = jtag_tck;
294+
291295
`endif
292296

297+
assign LED0 = ~hard_rst_n;
298+
assign LED1 = heartbeat;
299+
assign D_OUT_T12 = ~heartbeat;
300+
assign LED3 = 1'b1;
301+
assign LED4 = 1'b0;
302+
assign LED5 = 1'b1;
293303

294304

295305
assign uart_hsel = ahb_dmem_haddr[31:16] == 16'b1111_1111_0000_0001; //uart
296306
assign dmem_hsel = ahb_dmem_haddr[31:16] == 16'b1111_1111_1111_1111; //rom
297307
assign imem_hsel = ahb_imem_haddr[31:16] == 16'b1111_1111_1111_1111;
308+
298309
assign hsel_ = {dmem_hsel, uart_hsel};
299310
assign hreadyout = {dmem_ready, uart_hready};
300311
assign hresp = {dmem_resp, uart_hresp};

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