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1 parent 01f0c89 commit afbfc93Copy full SHA for afbfc93
tcl/target/syntacore_riscv.cfg
@@ -2,7 +2,7 @@ proc init_targets {} {
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adapter_khz 2000
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reset_config trst_and_srst
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set _CHIPNAME riscv
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- jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0xdeb13001 -expected-id 0xdeb14001 -expected-id 0xdeb15001
+ jtag newtap $_CHIPNAME cpu -irlen 5
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME riscv -endian little -chain-position $_TARGETNAME -coreid 0
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