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2 parents b3a4062 + 30ce455 commit d6232aaCopy full SHA for d6232aa
arch/riscv/boot.c
@@ -71,7 +71,7 @@ __attribute__((naked, section(".text.prologue"))) void _entry(void)
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"csrw mtvec, t0\n"
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/* Enable machine-level external interrupts (MIE.MEIE).
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- * This allows peripherals like the CLINT timer to raise interrupts.
+ * This allows peripherals like the UART to raise interrupts.
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* Global interrupts remain disabled by mstatus.MIE until the scheduler
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* is ready.
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*/
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