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Improve the comments about mtval
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src/emulate.c

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@@ -65,6 +65,22 @@ static void rv_exception_default_handler(riscv_t *rv)
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rv->PC = rv->csr_mepc; /* mret */
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}
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/* When a trap occurs in M-mode, mtval is either initialized to zero or
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* populated with exception-specific details to assist software in managing
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* the trap. Otherwise, the implementation never modifies mtval, although
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* software can explicitly write to it. The hardware platform will define
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* which exceptions are required to informatively set mtval and which may
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* consistently set it to zero.
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*
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* When a hardware breakpoint is triggered or an exception like address
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* misalignment, access fault, or page fault occurs during an instruction
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* fetch, load, or store operation, mtval is updated with the virtual address
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* that caused the fault. In the case of an illegal instruction trap, mtval
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* might be updated with the first XLEN or ILEN bits of the offending
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* instruction. For all other traps, mtval is simply set to zero. However,
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* it is worth noting that a future standard could redefine how mtval is
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* handled for different types of traps.
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*/
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#define EXCEPTION_HANDLER_IMPL(type, code) \
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static void rv_except_##type(riscv_t *rv, uint32_t mtval) \
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{ \

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