Merge pull request #338 from visitorckw/fix-csrrc

jserv · web-flow · commit a593b2360097 · 2024-01-29T06:17:45.000+08:00
Fix csrrc instruction behavior when rs1 is 0
diff --git a/src/rv32_template.c b/src/rv32_template.c
@@ -992,7 +992,7 @@ RVOP(
     csrrc,
     {
         uint32_t tmp = csr_csrrc(
-            rv, ir->imm, (ir->rs1 == rv_reg_zero) ? ~0U : rv->X[ir->rs1]);
+            rv, ir->imm, (ir->rs1 == rv_reg_zero) ? 0U : rv->X[ir->rs1]);
         rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];
     },
     GEN({

Original file line number	Diff line number	Diff line change
`@@ -992,7 +992,7 @@ RVOP(`
`992`	`992`	`csrrc,`
`993`	`993`	`{`
`994`	`994`	`uint32_t tmp = csr_csrrc(`
`995`		`- rv, ir->imm, (ir->rs1 == rv_reg_zero) ? ~0U : rv->X[ir->rs1]);`
	`995`	`+ rv, ir->imm, (ir->rs1 == rv_reg_zero) ? 0U : rv->X[ir->rs1]);`
`996`	`996`	`rv->X[ir->rd] = ir->rd ? tmp : rv->X[ir->rd];`
`997`	`997`	`},`
`998`	`998`	`GEN({`