Unify naming scheme

jserv · jserv · commit 71c37463eb03 · 2024-01-18T10:57:16.000+08:00
diff --git a/plic.c b/plic.c
@@ -89,7 +89,7 @@ void plic_read(vm_t *vm,
         vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
@@ -110,7 +110,7 @@ void plic_write(vm_t *vm,
         vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
diff --git a/ram.c b/ram.c
@@ -38,7 +38,7 @@ void ram_read(vm_t *vm,
         RAM_FUNC(1, *value = (uint32_t) (int32_t) (int8_t) ((*cell) >> offset));
         break;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
@@ -63,7 +63,7 @@ void ram_write(vm_t *vm,
                                                                    << offset);
         break;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
diff --git a/riscv.c b/riscv.c
@@ -391,7 +391,7 @@ static void op_privileged(vm_t *vm, uint32_t insn)
         return;
     }
     if (insn & ((MASK(5) << 7) | (MASK(5) << 15))) {
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
     switch (decode_i_unsigned(insn)) {
@@ -408,7 +408,7 @@ static void op_privileged(vm_t *vm, uint32_t insn)
                          /* TODO: Implement this */
         break;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         break;
     }
 }
@@ -432,7 +432,7 @@ static void csr_read(vm_t *vm, uint16_t addr, uint32_t *value)
     if ((addr >> 8) == 0xC) {
         uint16_t idx = addr & MASK(7);
         if (idx >= 0x20 || !(vm->s_mode || ((vm->scounteren >> idx) & 1)))
-            vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+            vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         else {
             /* Use the instruction counter for all of the counters.
              * Ideally, reads should return the value before the increment,
@@ -445,7 +445,7 @@ static void csr_read(vm_t *vm, uint16_t addr, uint32_t *value)
     }
 
     if (!vm->s_mode) {
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 
@@ -488,14 +488,14 @@ static void csr_read(vm_t *vm, uint16_t addr, uint32_t *value)
         *value = vm->stval;
         break;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
     }
 }
 
 static void csr_write(vm_t *vm, uint16_t addr, uint32_t value)
 {
     if (!vm->s_mode) {
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 
@@ -540,7 +540,7 @@ static void csr_write(vm_t *vm, uint16_t addr, uint32_t value)
         vm->stval = value;
         break;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
     }
 }
 
@@ -600,7 +600,7 @@ static void op_system(vm_t *vm, uint32_t insn)
         break;
 
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
@@ -689,7 +689,7 @@ static bool op_jmp(vm_t *vm, uint32_t insn, uint32_t a, uint32_t b)
     case 0b101: /* BFUNC_BGE */
         return ((int32_t) a) >= ((int32_t) b);
     }
-    vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+    vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
     return false;
 }
 
@@ -724,15 +724,15 @@ static void op_jump_link(vm_t *vm, uint32_t insn, uint32_t addr)
 static void op_amo(vm_t *vm, uint32_t insn)
 {
     if (unlikely(decode_func3(insn) != 0b010 /* amo.w */))
-        return vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        return vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
     uint32_t addr = read_rs1(vm, insn);
     uint32_t value, value2;
     switch (decode_func5(insn)) {
     case 0b00010: /* AMO_LR */
         if (addr & 0b11)
             return vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, addr);
         if (decode_rs2(insn))
-            return vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+            return vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         mmu_load(vm, addr, RV_MEM_LW, &value, true);
         if (vm->error)
             return;
@@ -775,7 +775,7 @@ static void op_amo(vm_t *vm, uint32_t insn)
         AMO_OP(value > value2 ? value : value2);
         break;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
@@ -860,7 +860,7 @@ void vm_step(vm_t *vm)
                     /* TODO: implement for multi-threading */
             break;
         default:
-            vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+            vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
             break;
         }
         break;
@@ -871,7 +871,7 @@ void vm_step(vm_t *vm)
         op_system(vm, insn);
         break;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         break;
     }
 }
diff --git a/riscv_private.h b/riscv_private.h
@@ -62,7 +62,7 @@ enum {
 enum {
     RV_EXC_PC_MISALIGN = 0,    /**< Instruction address misaligned */
     RV_EXC_FETCH_FAULT = 1,    /**< Instruction access fault */
-    RV_EXC_ILLEGAL_INSTR = 2,  /**< Illegal instruction */
+    RV_EXC_ILLEGAL_INSN = 2,   /**< Illegal instruction */
     RV_EXC_BREAKPOINT = 3,     /**< Breakpoint */
     RV_EXC_LOAD_MISALIGN = 4,  /**< Load address misaligned */
     RV_EXC_LOAD_FAULT = 5,     /**< Load access fault */
diff --git a/uart.c b/uart.c
@@ -182,7 +182,7 @@ void u8250_read(vm_t *vm,
         vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
@@ -202,7 +202,7 @@ void u8250_write(vm_t *vm,
         vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
diff --git a/virtio-blk.c b/virtio-blk.c
@@ -403,7 +403,7 @@ void virtio_blk_read(vm_t *vm,
         vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
@@ -424,7 +424,7 @@ void virtio_blk_write(vm_t *vm,
         vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
diff --git a/virtio-net.c b/virtio-net.c
@@ -407,7 +407,7 @@ void virtio_net_read(vm_t *vm,
         vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }
@@ -428,7 +428,7 @@ void virtio_net_write(vm_t *vm,
         vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);
         return;
     default:
-        vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);
+        vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);
         return;
     }
 }

Original file line number	Diff line number	Diff line change
`@@ -89,7 +89,7 @@ void plic_read(vm_t *vm,`
`89`	`89`	`vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);`
`90`	`90`	`return;`
`91`	`91`	`default:`
`92`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`92`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`93`	`93`	`return;`
`94`	`94`	`}`
`95`	`95`	`}`
`@@ -110,7 +110,7 @@ void plic_write(vm_t *vm,`
`110`	`110`	`vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);`
`111`	`111`	`return;`
`112`	`112`	`default:`
`113`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`113`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`114`	`114`	`return;`
`115`	`115`	`}`
`116`	`116`	`}`
Original file line number	Diff line number	Diff line change
`@@ -38,7 +38,7 @@ void ram_read(vm_t *vm,`
`38`	`38`	`RAM_FUNC(1, value = (uint32_t) (int32_t) (int8_t) ((cell) >> offset));`
`39`	`39`	`break;`
`40`	`40`	`default:`
`41`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`41`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`42`	`42`	`return;`
`43`	`43`	`}`
`44`	`44`	`}`
`@@ -63,7 +63,7 @@ void ram_write(vm_t *vm,`
`63`	`63`	`<< offset);`
`64`	`64`	`break;`
`65`	`65`	`default:`
`66`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`66`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`67`	`67`	`return;`
`68`	`68`	`}`
`69`	`69`	`}`
Original file line number	Diff line number	Diff line change
`@@ -391,7 +391,7 @@ static void op_privileged(vm_t *vm, uint32_t insn)`
`391`	`391`	`return;`
`392`	`392`	`}`
`393`	`393`	`if (insn & ((MASK(5) << 7) \| (MASK(5) << 15))) {`
`394`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`394`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`395`	`395`	`return;`
`396`	`396`	`}`
`397`	`397`	`switch (decode_i_unsigned(insn)) {`
`@@ -408,7 +408,7 @@ static void op_privileged(vm_t *vm, uint32_t insn)`
`408`	`408`	`/* TODO: Implement this */`
`409`	`409`	`break;`
`410`	`410`	`default:`
`411`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`411`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`412`	`412`	`break;`
`413`	`413`	`}`
`414`	`414`	`}`
`@@ -432,7 +432,7 @@ static void csr_read(vm_t vm, uint16_t addr, uint32_t value)`
`432`	`432`	`if ((addr >> 8) == 0xC) {`
`433`	`433`	`uint16_t idx = addr & MASK(7);`
`434`	`434`	`if (idx >= 0x20 \|\| !(vm->s_mode \|\| ((vm->scounteren >> idx) & 1)))`
`435`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`435`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`436`	`436`	`else {`
`437`	`437`	`/* Use the instruction counter for all of the counters.`
`438`	`438`	`* Ideally, reads should return the value before the increment,`
`@@ -445,7 +445,7 @@ static void csr_read(vm_t vm, uint16_t addr, uint32_t value)`
`445`	`445`	`}`
`446`	`446`
`447`	`447`	`if (!vm->s_mode) {`
`448`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`448`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`449`	`449`	`return;`
`450`	`450`	`}`
`451`	`451`
`@@ -488,14 +488,14 @@ static void csr_read(vm_t vm, uint16_t addr, uint32_t value)`
`488`	`488`	`*value = vm->stval;`
`489`	`489`	`break;`
`490`	`490`	`default:`
`491`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`491`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`492`	`492`	`}`
`493`	`493`	`}`
`494`	`494`
`495`	`495`	`static void csr_write(vm_t *vm, uint16_t addr, uint32_t value)`
`496`	`496`	`{`
`497`	`497`	`if (!vm->s_mode) {`
`498`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`498`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`499`	`499`	`return;`
`500`	`500`	`}`
`501`	`501`
`@@ -540,7 +540,7 @@ static void csr_write(vm_t *vm, uint16_t addr, uint32_t value)`
`540`	`540`	`vm->stval = value;`
`541`	`541`	`break;`
`542`	`542`	`default:`
`543`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`543`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`544`	`544`	`}`
`545`	`545`	`}`
`546`	`546`
`@@ -600,7 +600,7 @@ static void op_system(vm_t *vm, uint32_t insn)`
`600`	`600`	`break;`
`601`	`601`
`602`	`602`	`default:`
`603`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`603`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`604`	`604`	`return;`
`605`	`605`	`}`
`606`	`606`	`}`
`@@ -689,7 +689,7 @@ static bool op_jmp(vm_t *vm, uint32_t insn, uint32_t a, uint32_t b)`
`689`	`689`	`case 0b101: /* BFUNC_BGE */`
`690`	`690`	`return ((int32_t) a) >= ((int32_t) b);`
`691`	`691`	`}`
`692`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`692`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`693`	`693`	`return false;`
`694`	`694`	`}`
`695`	`695`
`@@ -724,15 +724,15 @@ static void op_jump_link(vm_t *vm, uint32_t insn, uint32_t addr)`
`724`	`724`	`static void op_amo(vm_t *vm, uint32_t insn)`
`725`	`725`	`{`
`726`	`726`	`if (unlikely(decode_func3(insn) != 0b010 /* amo.w */))`
`727`		`- return vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`727`	`+ return vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`728`	`728`	`uint32_t addr = read_rs1(vm, insn);`
`729`	`729`	`uint32_t value, value2;`
`730`	`730`	`switch (decode_func5(insn)) {`
`731`	`731`	`case 0b00010: /* AMO_LR */`
`732`	`732`	`if (addr & 0b11)`
`733`	`733`	`return vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, addr);`
`734`	`734`	`if (decode_rs2(insn))`
`735`		`- return vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`735`	`+ return vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`736`	`736`	`mmu_load(vm, addr, RV_MEM_LW, &value, true);`
`737`	`737`	`if (vm->error)`
`738`	`738`	`return;`
`@@ -775,7 +775,7 @@ static void op_amo(vm_t *vm, uint32_t insn)`
`775`	`775`	`AMO_OP(value > value2 ? value : value2);`
`776`	`776`	`break;`
`777`	`777`	`default:`
`778`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`778`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`779`	`779`	`return;`
`780`	`780`	`}`
`781`	`781`	`}`
`@@ -860,7 +860,7 @@ void vm_step(vm_t *vm)`
`860`	`860`	`/* TODO: implement for multi-threading */`
`861`	`861`	`break;`
`862`	`862`	`default:`
`863`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`863`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`864`	`864`	`break;`
`865`	`865`	`}`
`866`	`866`	`break;`
`@@ -871,7 +871,7 @@ void vm_step(vm_t *vm)`
`871`	`871`	`op_system(vm, insn);`
`872`	`872`	`break;`
`873`	`873`	`default:`
`874`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`874`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`875`	`875`	`break;`
`876`	`876`	`}`
`877`	`877`	`}`
Original file line number	Diff line number	Diff line change
`@@ -182,7 +182,7 @@ void u8250_read(vm_t *vm,`
`182`	`182`	`vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);`
`183`	`183`	`return;`
`184`	`184`	`default:`
`185`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`185`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`186`	`186`	`return;`
`187`	`187`	`}`
`188`	`188`	`}`
`@@ -202,7 +202,7 @@ void u8250_write(vm_t *vm,`
`202`	`202`	`vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);`
`203`	`203`	`return;`
`204`	`204`	`default:`
`205`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`205`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`206`	`206`	`return;`
`207`	`207`	`}`
`208`	`208`	`}`
Original file line number	Diff line number	Diff line change
`@@ -403,7 +403,7 @@ void virtio_blk_read(vm_t *vm,`
`403`	`403`	`vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);`
`404`	`404`	`return;`
`405`	`405`	`default:`
`406`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`406`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`407`	`407`	`return;`
`408`	`408`	`}`
`409`	`409`	`}`
`@@ -424,7 +424,7 @@ void virtio_blk_write(vm_t *vm,`
`424`	`424`	`vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);`
`425`	`425`	`return;`
`426`	`426`	`default:`
`427`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`427`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`428`	`428`	`return;`
`429`	`429`	`}`
`430`	`430`	`}`
Original file line number	Diff line number	Diff line change
`@@ -407,7 +407,7 @@ void virtio_net_read(vm_t *vm,`
`407`	`407`	`vm_set_exception(vm, RV_EXC_LOAD_MISALIGN, vm->exc_val);`
`408`	`408`	`return;`
`409`	`409`	`default:`
`410`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`410`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`411`	`411`	`return;`
`412`	`412`	`}`
`413`	`413`	`}`
`@@ -428,7 +428,7 @@ void virtio_net_write(vm_t *vm,`
`428`	`428`	`vm_set_exception(vm, RV_EXC_STORE_MISALIGN, vm->exc_val);`
`429`	`429`	`return;`
`430`	`430`	`default:`
`431`		`- vm_set_exception(vm, RV_EXC_ILLEGAL_INSTR, 0);`
	`431`	`+ vm_set_exception(vm, RV_EXC_ILLEGAL_INSN, 0);`
`432`	`432`	`return;`
`433`	`433`	`}`
`434`	`434`	`}`