Refactor RISC-V sign extension to reduce code duplication

Extract common instruction sequence and parameterize differences
to eliminate repeated emit calls in OP_sign_ext cases.

Author: hhhh1300

src/riscv-codegen.c

@@ -443,20 +443,20 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
     case OP_sign_ext:
         if (ph2_ir->src1 == 1) {
             /* Sign extend from byte to word */
-            emit(__andi(rd, rs1, 0xFF));
-            emit(__slli(rd, rd, 24));
-            emit(__srai(rd, rd, 24));
+            rs2 = 0xFF;
+            ofs = 24;
         } else if (ph2_ir->src1 == 2) {
             /* Sign extend from short to word */
-            emit(__andi(rd, rs1, 0xFFFF));
-            emit(__slli(rd, rd, 16)); /* Shift left 16 bits */
-            emit(__srai(rd, rd, 16)); /* Arithmetic shift right 16 bits */
+            rs2 = 0xFFFF;
+            ofs = 16;
         } else {
             /* Fallback to original behavior for unknown sizes */
-            emit(__andi(rd, rs1, 0xFF));
-            emit(__slli(rd, rd, 24));
-            emit(__srai(rd, rd, 24));
+            rs2 = 0xFF;
+            ofs = 24;
         }
+        emit(__andi(rd, rs1, rs2));
+        emit(__slli(rd, rd, ofs));
+        emit(__srai(rd, rd, ofs));
         return;
     case OP_cast:
         /* Generic cast operation - for now, just move the value */