Use branchless way to get rv_hi/rv_lo result

fennecJ · fennecJ · commit 51284da7e37a · 2024-08-06T04:05:12.000+08:00
We can avoid using conditional branch via bitwise operation.
The value of `((val &amp; (1 &lt;&lt; 11)) &lt;&lt; 1)` is exactly 4096 if
`(val &amp; (1 &lt;&lt; 11))` is true.
diff --git a/src/riscv.c b/src/riscv.c
@@ -112,16 +112,12 @@ int rv_extract_bits(int imm, int i_start, int i_end, int d_start, int d_end)
 
 int rv_hi(int val)
 {
-    if ((val & (1 << 11)) != 0)
-        return val + 4096;
-    return val;
+    return val + ((val & (1 << 11)) << 1);
 }
 
 int rv_lo(int val)
 {
-    if ((val & (1 << 11)) != 0)
-        return (val & 0xFFF) - 4096;
-    return val & 0xFFF;
+    return (val & 0xFFF) - ((val & (1 << 11)) << 1);
 }
 
 int rv_encode_R(rv_op op, rv_reg rd, rv_reg rs1, rv_reg rs2)

Original file line number	Diff line number	Diff line change
`@@ -112,16 +112,12 @@ int rv_extract_bits(int imm, int i_start, int i_end, int d_start, int d_end)`
`112`	`112`
`113`	`113`	`int rv_hi(int val)`
`114`	`114`	`{`
`115`		`- if ((val & (1 << 11)) != 0)`
`116`		`- return val + 4096;`
`117`		`- return val;`
	`115`	`+ return val + ((val & (1 << 11)) << 1);`
`118`	`116`	`}`
`119`	`117`
`120`	`118`	`int rv_lo(int val)`
`121`	`119`	`{`
`122`		`- if ((val & (1 << 11)) != 0)`
`123`		`- return (val & 0xFFF) - 4096;`
`124`		`- return val & 0xFFF;`
	`120`	`+ return (val & 0xFFF) - ((val & (1 << 11)) << 1);`
`125`	`121`	`}`
`126`	`122`
`127`	`123`	`int rv_encode_R(rv_op op, rv_reg rd, rv_reg rs1, rv_reg rs2)`