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rename local variable
1 parent 8ebcac9 commit 902e0fb

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2 files changed

+20
-20
lines changed

2 files changed

+20
-20
lines changed

src/arm-codegen.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -198,7 +198,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
198198
* 1. division and modulo.
199199
* 2. load and store operations.
200200
*/
201-
arm_reg helper_reg;
201+
arm_reg interm;
202202

203203
switch (ph2_ir->op) {
204204
case OP_define:
@@ -239,25 +239,25 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
239239
return;
240240
case OP_load:
241241
case OP_global_load:
242-
helper_reg = ph2_ir->op == OP_load ? __sp : __r12;
242+
interm = ph2_ir->op == OP_load ? __sp : __r12;
243243
if (ph2_ir->src0 > 4095) {
244244
emit(__movw(__AL, __r8, ph2_ir->src0));
245245
emit(__movt(__AL, __r8, ph2_ir->src0));
246-
emit(__add_r(__AL, __r8, helper_reg, __r8));
246+
emit(__add_r(__AL, __r8, interm, __r8));
247247
emit(__lw(__AL, rd, __r8, 0));
248248
} else
249-
emit(__lw(__AL, rd, helper_reg, ph2_ir->src0));
249+
emit(__lw(__AL, rd, interm, ph2_ir->src0));
250250
return;
251251
case OP_store:
252252
case OP_global_store:
253-
helper_reg = ph2_ir->op == OP_store ? __sp : __r12;
253+
interm = ph2_ir->op == OP_store ? __sp : __r12;
254254
if (ph2_ir->src1 > 4095) {
255255
emit(__movw(__AL, __r8, ph2_ir->src1));
256256
emit(__movt(__AL, __r8, ph2_ir->src1));
257-
emit(__add_r(__AL, __r8, helper_reg, __r8));
257+
emit(__add_r(__AL, __r8, interm, __r8));
258258
emit(__sw(__AL, rn, __r8, 0));
259259
} else
260-
emit(__sw(__AL, rn, helper_reg, ph2_ir->src1));
260+
emit(__sw(__AL, rn, interm, ph2_ir->src1));
261261
return;
262262
case OP_read:
263263
if (ph2_ir->src1 == 1)
@@ -339,7 +339,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
339339
}
340340
return;
341341
}
342-
helper_reg = __r8;
342+
interm = __r8;
343343
/* div/mod emulation */
344344
/* Preserve the values of the dividend and divisor */
345345
emit(__stmdb(__AL, 1, __sp, (1 << rn) | (1 << rm)));
@@ -357,7 +357,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
357357
* in __r9. The sign of the divisor is irrelevant for determining
358358
* the result's sign.
359359
*/
360-
helper_reg = __r9;
360+
interm = __r9;
361361
emit(__mov_r(__AL, __r10, __r8));
362362
}
363363
/* Unsigned integer division */
@@ -388,7 +388,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
388388
*/
389389
emit(__mov_r(__AL, __r9, rn));
390390
emit(__ldm(__AL, 1, __sp, (1 << rn) | (1 << rm)));
391-
emit(__mov_r(__AL, rd, helper_reg));
391+
emit(__mov_r(__AL, rd, interm));
392392
/* Handle the correct sign for the quotient or remainder */
393393
emit(__cmp_i(__AL, __r10, 0));
394394
emit(__rsb_i(__NE, rd, 0, rd));

src/riscv-codegen.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
162162
* 1. division and modulo.
163163
* 2. load and store operations.
164164
*/
165-
rv_reg helper_reg, divisor_mask = __t1;
165+
rv_reg interm, divisor_mask = __t1;
166166

167167
switch (ph2_ir->op) {
168168
case OP_define:
@@ -200,25 +200,25 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
200200
return;
201201
case OP_load:
202202
case OP_global_load:
203-
helper_reg = ph2_ir->op == OP_load ? __sp : __gp;
203+
interm = ph2_ir->op == OP_load ? __sp : __gp;
204204
if (ph2_ir->src0 < -2048 || ph2_ir->src0 > 2047) {
205205
emit(__lui(__t0, rv_hi(ph2_ir->src0)));
206206
emit(__addi(__t0, __t0, rv_lo(ph2_ir->src0)));
207-
emit(__add(__t0, helper_reg, __t0));
207+
emit(__add(__t0, interm, __t0));
208208
emit(__lw(rd, __t0, 0));
209209
} else
210-
emit(__lw(rd, helper_reg, ph2_ir->src0));
210+
emit(__lw(rd, interm, ph2_ir->src0));
211211
return;
212212
case OP_store:
213213
case OP_global_store:
214-
helper_reg = ph2_ir->op == OP_store ? __sp : __gp;
214+
interm = ph2_ir->op == OP_store ? __sp : __gp;
215215
if (ph2_ir->src1 < -2048 || ph2_ir->src1 > 2047) {
216216
emit(__lui(__t0, rv_hi(ph2_ir->src1)));
217217
emit(__addi(__t0, __t0, rv_lo(ph2_ir->src1)));
218-
emit(__add(__t0, helper_reg, __t0));
218+
emit(__add(__t0, interm, __t0));
219219
emit(__sw(rs1, __t0, 0));
220220
} else
221-
emit(__sw(rs1, helper_reg, ph2_ir->src1));
221+
emit(__sw(rs1, interm, ph2_ir->src1));
222222
return;
223223
case OP_read:
224224
if (ph2_ir->src1 == 1)
@@ -313,14 +313,14 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
313313
emit(__mod(rd, rs1, rs2));
314314
return;
315315
}
316-
helper_reg = __t0;
316+
interm = __t0;
317317
/* div/mod emulation */
318318
if (ph2_ir->op == OP_mod) {
319319
/* If the requested operation is modulo, the result will be stored
320320
* in __t2. The sign of the divisor is irrelevant for determining
321321
* the result's sign.
322322
*/
323-
helper_reg = __t2;
323+
interm = __t2;
324324
divisor_mask = __zero;
325325
}
326326
/* Obtain absolute values of the dividend and divisor */
@@ -348,7 +348,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
348348
emit(__srli(__t1, __t1, 1));
349349
emit(__srli(__t3, __t3, 1));
350350
emit(__bne(__t1, __zero, -20));
351-
emit(__addi(rd, helper_reg, 0));
351+
emit(__addi(rd, interm, 0));
352352
/* Handle the correct sign for the quotient or remainder */
353353
emit(__beq(__t5, __zero, 8));
354354
emit(__sub(rd, __zero, rd));

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