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[GlobalISel] Add G_SUB for computeNumSignBits (llvm#158384)
This patch ports the ISD::SUB handling from SelectionDAG’s ComputeNumSignBits to GlobalISel. Related to llvm#150515. --------- Co-authored-by: Matt Arsenault <[email protected]> Co-authored-by: Simon Pilgrim <[email protected]>
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lines changed

6 files changed

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‎llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp‎

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1975,6 +1975,44 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
19751975

19761976
break;
19771977
}
1978+
case TargetOpcode::G_SUB: {
1979+
Register Src2 = MI.getOperand(2).getReg();
1980+
unsigned Src2NumSignBits =
1981+
computeNumSignBits(Src2, DemandedElts, Depth + 1);
1982+
if (Src2NumSignBits == 1)
1983+
return 1; // Early out.
1984+
1985+
// Handle NEG.
1986+
Register Src1 = MI.getOperand(1).getReg();
1987+
KnownBits Known1 = getKnownBits(Src1, DemandedElts, Depth);
1988+
if (Known1.isZero()) {
1989+
KnownBits Known2 = getKnownBits(Src2, DemandedElts, Depth);
1990+
// If the input is known to be 0 or 1, the output is 0/-1, which is all
1991+
// sign bits set.
1992+
if ((Known2.Zero | 1).isAllOnes())
1993+
return TyBits;
1994+
1995+
// If the input is known to be positive (the sign bit is known clear),
1996+
// the output of the NEG has, at worst, the same number of sign bits as
1997+
// the input.
1998+
if (Known2.isNonNegative()) {
1999+
FirstAnswer = Src2NumSignBits;
2000+
break;
2001+
}
2002+
2003+
// Otherwise, we treat this like a SUB.
2004+
}
2005+
2006+
unsigned Src1NumSignBits =
2007+
computeNumSignBits(Src1, DemandedElts, Depth + 1);
2008+
if (Src1NumSignBits == 1)
2009+
return 1; // Early Out.
2010+
2011+
// Sub can have at most one carry bit. Thus we know that the output
2012+
// is, at worst, one more bit than the inputs.
2013+
FirstAnswer = std::min(Src1NumSignBits, Src2NumSignBits) - 1;
2014+
break;
2015+
}
19782016
case TargetOpcode::G_FCMP:
19792017
case TargetOpcode::G_ICMP: {
19802018
bool IsFP = Opcode == TargetOpcode::G_FCMP;

‎llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,8 @@ body: |
102102
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
103103
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
104104
%0:_(<4 x s16>) = COPY $d0
105-
%2:_(s16) = COPY $h0
106-
%1:_(s16) = G_CONSTANT i16 3
105+
%1:_(s16) = COPY $h0
106+
%2:_(s16) = G_CONSTANT i16 3
107107
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
108108
%4:_(<4 x s16>) = G_ASHR %0, %3
109109
...

‎llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -135,8 +135,8 @@ body: |
135135
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
136136
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
137137
%0:_(<4 x s16>) = COPY $d0
138-
%2:_(s16) = COPY $h0
139-
%1:_(s16) = G_CONSTANT i16 3
138+
%1:_(s16) = COPY $h0
139+
%2:_(s16) = G_CONSTANT i16 3
140140
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
141141
%4:_(<4 x s16>) = G_SHL %0, %3
142142
...

‎llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir‎

Lines changed: 276 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,276 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
2+
# RUN: llc -mtriple=aarch64 -passes="print<gisel-value-tracking>" -filetype=null %s 2>&1 | FileCheck %s
3+
4+
---
5+
name: Cst
6+
body: |
7+
bb.1:
8+
; CHECK-LABEL: name: @Cst
9+
; CHECK-NEXT: %0:_ KnownBits:00000010 SignBits:6
10+
; CHECK-NEXT: %1:_ KnownBits:11100000 SignBits:3
11+
; CHECK-NEXT: %2:_ KnownBits:00100010 SignBits:2
12+
%0:_(s8) = G_CONSTANT i8 2
13+
%1:_(s8) = G_CONSTANT i8 224
14+
%2:_(s8) = G_SUB %0, %1
15+
...
16+
---
17+
name: CstZero
18+
body: |
19+
bb.1:
20+
; CHECK-LABEL: name: @CstZero
21+
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
22+
; CHECK-NEXT: %1:_ KnownBits:00000000 SignBits:8
23+
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
24+
%0:_(s8) = G_CONSTANT i8 0
25+
%1:_(s8) = G_CONSTANT i8 0
26+
%2:_(s8) = G_SUB %0, %1
27+
...
28+
---
29+
name: CstNegOne
30+
body: |
31+
bb.1:
32+
; CHECK-LABEL: name: @CstNegOne
33+
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
34+
; CHECK-NEXT: %1:_ KnownBits:00000001 SignBits:7
35+
; CHECK-NEXT: %2:_ KnownBits:11111111 SignBits:8
36+
%0:_(s8) = G_CONSTANT i8 0
37+
%1:_(s8) = G_CONSTANT i8 1
38+
%2:_(s8) = G_SUB %0, %1
39+
...
40+
---
41+
name: CstNegFour
42+
body: |
43+
bb.1:
44+
; CHECK-LABEL: name: @CstNegFour
45+
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
46+
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
47+
; CHECK-NEXT: %2:_ KnownBits:11111100 SignBits:6
48+
%0:_(s8) = G_CONSTANT i8 0
49+
%1:_(s8) = G_CONSTANT i8 4
50+
%2:_(s8) = G_SUB %0, %1
51+
...
52+
---
53+
name: CstNeg
54+
body: |
55+
bb.1:
56+
; CHECK-LABEL: name: @CstNeg
57+
; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3
58+
; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
59+
; CHECK-NEXT: %2:_ KnownBits:11011110 SignBits:2
60+
%0:_(s8) = G_CONSTANT i8 224
61+
%1:_(s8) = G_CONSTANT i8 2
62+
%2:_(s8) = G_SUB %0, %1
63+
...
64+
---
65+
name: ScalarVar
66+
body: |
67+
bb.1:
68+
; CHECK-LABEL: name: @ScalarVar
69+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
70+
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
71+
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
72+
%0:_(s8) = COPY $b0
73+
%1:_(s8) = COPY $b1
74+
%2:_(s8) = G_SUB %0, %1
75+
...
76+
---
77+
name: ScalarRhsEarlyOut
78+
body: |
79+
bb.1:
80+
; CHECK-LABEL: name: @ScalarRhsEarlyOut
81+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
82+
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
83+
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
84+
%0:_(s8) = COPY $b0
85+
%1:_(s8) = G_CONSTANT i8 3
86+
%2:_(s8) = G_SUB %0, %1
87+
...
88+
---
89+
name: ScalarNonNegative
90+
body: |
91+
bb.1:
92+
; CHECK-LABEL: name: @ScalarNonNegative
93+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
94+
; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
95+
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
96+
; CHECK-NEXT: %3:_ KnownBits:00000000 SignBits:8
97+
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:4
98+
%0:_(s8) = COPY $b0
99+
%1:_(s8) = G_CONSTANT i8 15
100+
%2:_(s8) = G_AND %0, %1
101+
%3:_(s8) = G_CONSTANT i8 0
102+
%4:_(s8) = G_SUB %3, %2
103+
...
104+
---
105+
name: ScalarLhsEarlyOut
106+
body: |
107+
bb.1:
108+
; CHECK-LABEL: name: @ScalarLhsEarlyOut
109+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
110+
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
111+
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
112+
%0:_(s8) = COPY $b0
113+
%1:_(s8) = G_CONSTANT i8 3
114+
%2:_(s8) = G_SUB %1, %0
115+
...
116+
---
117+
name: ScalarPartKnown
118+
body: |
119+
bb.1:
120+
; CHECK-LABEL: name: @ScalarPartKnown
121+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
122+
; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
123+
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
124+
; CHECK-NEXT: %3:_ KnownBits:00000101 SignBits:5
125+
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:3
126+
%0:_(s8) = COPY $b0
127+
%1:_(s8) = G_CONSTANT i8 15
128+
%2:_(s8) = G_AND %0, %1
129+
%3:_(s8) = G_CONSTANT i8 5
130+
%4:_(s8) = G_SUB %2, %3
131+
...
132+
---
133+
name: VectorCstZero
134+
body: |
135+
bb.1:
136+
; CHECK-LABEL: name: @VectorCstZero
137+
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
138+
; CHECK-NEXT: %1:_ KnownBits:0000000000000000 SignBits:16
139+
; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
140+
; CHECK-NEXT: %3:_ KnownBits:0000000000000000 SignBits:16
141+
%0:_(s16) = G_CONSTANT i16 0
142+
%1:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
143+
%2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
144+
%3:_(<4 x s16>) = G_SUB %1, %2
145+
...
146+
---
147+
name: VectorCstNegOne
148+
body: |
149+
bb.1:
150+
; CHECK-LABEL: name: @VectorCstNegOne
151+
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
152+
; CHECK-NEXT: %1:_ KnownBits:0000000000000001 SignBits:15
153+
; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
154+
; CHECK-NEXT: %3:_ KnownBits:0000000000000001 SignBits:15
155+
; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
156+
%0:_(s16) = G_CONSTANT i16 0
157+
%1:_(s16) = G_CONSTANT i16 1
158+
%2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
159+
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
160+
%4:_(<4 x s16>) = G_SUB %2, %3
161+
...
162+
---
163+
name: VectorVar
164+
body: |
165+
bb.1:
166+
; CHECK-LABEL: name: @VectorVar
167+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
168+
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
169+
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
170+
%0:_(<4 x s16>) = COPY $d0
171+
%1:_(<4 x s16>) = COPY $d1
172+
%2:_(<4 x s16>) = G_SUB %0, %1
173+
...
174+
---
175+
name: VectorRhsEarlyOut
176+
body: |
177+
bb.1:
178+
; CHECK-LABEL: name: @VectorRhsEarlyOut
179+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
180+
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
181+
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
182+
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
183+
%0:_(<4 x s16>) = COPY $d0
184+
%1:_(s16) = G_CONSTANT i16 3
185+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
186+
%3:_(<4 x s16>) = G_SUB %2, %0
187+
...
188+
---
189+
name: VectorNonNegative
190+
body: |
191+
bb.1:
192+
; CHECK-LABEL: name: @VectorNonNegative
193+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
194+
; CHECK-NEXT: %1:_ KnownBits:0000000011111111 SignBits:8
195+
; CHECK-NEXT: %2:_ KnownBits:0000000011111111 SignBits:8
196+
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
197+
; CHECK-NEXT: %4:_ KnownBits:0000000000000000 SignBits:16
198+
; CHECK-NEXT: %5:_ KnownBits:0000000000000000 SignBits:16
199+
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:8
200+
%0:_(<4 x s16>) = COPY $d0
201+
%1:_(s16) = G_CONSTANT i16 255
202+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
203+
%3:_(<4 x s16>) = G_AND %0, %2
204+
%4:_(s16) = G_CONSTANT i16 0
205+
%5:_(<4 x s16>) = G_BUILD_VECTOR %4, %4, %4, %4
206+
%6:_(<4 x s16>) = G_SUB %5, %3
207+
...
208+
---
209+
name: VectorLhsEarlyOut
210+
body: |
211+
bb.1:
212+
; CHECK-LABEL: name: @VectorLhsEarlyOut
213+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
214+
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
215+
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
216+
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
217+
%0:_(<4 x s16>) = COPY $d0
218+
%1:_(s16) = G_CONSTANT i16 3
219+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
220+
%3:_(<4 x s16>) = G_SUB %0, %2
221+
...
222+
---
223+
name: VectorPartKnown
224+
body: |
225+
bb.1:
226+
; CHECK-LABEL: name: @VectorPartKnown
227+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
228+
; CHECK-NEXT: %1:_ KnownBits:0000000011111111 SignBits:8
229+
; CHECK-NEXT: %2:_ KnownBits:0000000011111111 SignBits:8
230+
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
231+
; CHECK-NEXT: %4:_ KnownBits:0000000000101010 SignBits:10
232+
; CHECK-NEXT: %5:_ KnownBits:0000000001001010 SignBits:9
233+
; CHECK-NEXT: %6:_ KnownBits:000000000??01010 SignBits:9
234+
; CHECK-NEXT: %7:_ KnownBits:???????????????? SignBits:7
235+
%0:_(<4 x s16>) = COPY $d0
236+
%1:_(s16) = G_CONSTANT i16 255
237+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
238+
%3:_(<4 x s16>) = G_AND %0, %2
239+
%4:_(s16) = G_CONSTANT i16 42
240+
%5:_(s16) = G_CONSTANT i16 74
241+
%6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
242+
%7:_(<4 x s16>) = G_SUB %6, %3
243+
...
244+
---
245+
name: VectorCst36
246+
body: |
247+
bb.1:
248+
; CHECK-LABEL: name: @VectorCst36
249+
; CHECK-NEXT: %0:_ KnownBits:0000000000000011 SignBits:14
250+
; CHECK-NEXT: %1:_ KnownBits:0000000000000110 SignBits:13
251+
; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
252+
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
253+
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:12
254+
%0:_(s16) = G_CONSTANT i16 3
255+
%1:_(s16) = G_CONSTANT i16 6
256+
%2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
257+
%3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
258+
%4:_(<4 x s16>) = G_SUB %2, %3
259+
...
260+
261+
---
262+
name: VectorCst3unknown
263+
body: |
264+
bb.1:
265+
; CHECK-LABEL: name: @VectorCst3unknown
266+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
267+
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
268+
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
269+
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
270+
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
271+
%0:_(<4 x s16>) = COPY $d0
272+
%1:_(s16) = COPY $h0
273+
%2:_(s16) = G_CONSTANT i16 3
274+
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
275+
%4:_(<4 x s16>) = G_SUB %0, %3
276+
...

‎llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -119,9 +119,10 @@ body: |
119119
; CHECK: [[R32:%[0-9]+]]:_(s32) = G_SUB [[COUNT]], [[BITDIFF]]
120120
%2(s16) = G_CTLZ %1
121121
122-
; CHECK: [[SHIFTEDR:%[0-9]+]]:_(s32) = G_SHL [[R32]], [[BITDIFF]]
123-
; CHECK: [[R:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDR]], [[BITDIFF]]
124-
; CHECK: $r0 = COPY [[R]]
122+
; LIBCALLS: [[SHIFTEDR:%[0-9]+]]:_(s32) = G_SHL [[R32]], [[BITDIFF]]
123+
; LIBCALLS: [[R:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDR]], [[BITDIFF]]
124+
; LIBCALLS: $r0 = COPY [[R]]
125+
; CLZ: $r0 = COPY [[R32]]
125126
%3(s32) = G_SEXT %2(s16)
126127
$r0 = COPY %3(s32)
127128
BX_RET 14, $noreg, implicit $r0

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