@@ -21,13 +21,11 @@ using namespace clang;
2121using namespace clang ::CIRGen;
2222
2323template <typename ... Operands>
24- static mlir::Value emitIntrinsicCallOp (CIRGenFunction &cgf, const CallExpr *e ,
25- const std::string & str,
24+ static mlir::Value emitIntrinsicCallOp (CIRGenBuilderTy &builder ,
25+ mlir::Location loc, const StringRef str,
2626 const mlir::Type &resTy,
2727 Operands &&...op) {
28- CIRGenBuilderTy &builder = cgf.getBuilder ();
29- mlir::Location location = cgf.getLoc (e->getExprLoc ());
30- return cir::LLVMIntrinsicCallOp::create (builder, location,
28+ return cir::LLVMIntrinsicCallOp::create (builder, loc,
3129 builder.getStringAttr (str), resTy,
3230 std::forward<Operands>(op)...)
3331 .getResult ();
@@ -68,10 +66,8 @@ static mlir::Value emitVectorFCmp(CIRGenBuilderTy &builder,
6866 return bitCast;
6967}
7068
71- static mlir::Value getMaskVecValue (CIRGenFunction &cgf, const CallExpr *expr ,
69+ static mlir::Value getMaskVecValue (CIRGenBuilderTy &builder, mlir::Location loc ,
7270 mlir::Value mask, unsigned numElems) {
73-
74- CIRGenBuilderTy &builder = cgf.getBuilder ();
7571 auto maskTy = cir::VectorType::get (
7672 builder.getUIntNTy (1 ), cast<cir::IntType>(mask.getType ()).getWidth ());
7773 mlir::Value maskVec = builder.createBitcast (mask, maskTy);
@@ -84,8 +80,7 @@ static mlir::Value getMaskVecValue(CIRGenFunction &cgf, const CallExpr *expr,
8480 for (auto i : llvm::seq<unsigned >(0 , numElems))
8581 indices.push_back (cir::IntAttr::get (i32Ty, i));
8682
87- maskVec = builder.createVecShuffle (cgf.getLoc (expr->getExprLoc ()), maskVec,
88- maskVec, indices);
83+ maskVec = builder.createVecShuffle (loc, maskVec, maskVec, indices);
8984 }
9085 return maskVec;
9186}
@@ -132,15 +127,20 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
132127 default :
133128 return {};
134129 case X86::BI_mm_clflush:
135- return emitIntrinsicCallOp (*this , expr, " x86.sse2.clflush" , voidTy, ops[0 ]);
130+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
131+ " x86.sse2.clflush" , voidTy, ops[0 ]);
136132 case X86::BI_mm_lfence:
137- return emitIntrinsicCallOp (*this , expr, " x86.sse2.lfence" , voidTy);
133+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
134+ " x86.sse2.lfence" , voidTy);
138135 case X86::BI_mm_pause:
139- return emitIntrinsicCallOp (*this , expr, " x86.sse2.pause" , voidTy);
136+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
137+ " x86.sse2.pause" , voidTy);
140138 case X86::BI_mm_mfence:
141- return emitIntrinsicCallOp (*this , expr, " x86.sse2.mfence" , voidTy);
139+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
140+ " x86.sse2.mfence" , voidTy);
142141 case X86::BI_mm_sfence:
143- return emitIntrinsicCallOp (*this , expr, " x86.sse.sfence" , voidTy);
142+ return emitIntrinsicCallOp (builder, getLoc (expr->getExprLoc ()),
143+ " x86.sse.sfence" , voidTy);
144144 case X86::BI_mm_prefetch:
145145 case X86::BI__rdtsc:
146146 case X86::BI__builtin_ia32_rdtscp: {
@@ -152,15 +152,17 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
152152 case X86::BI__builtin_ia32_lzcnt_u16:
153153 case X86::BI__builtin_ia32_lzcnt_u32:
154154 case X86::BI__builtin_ia32_lzcnt_u64: {
155- mlir::Value isZeroPoison = builder.getFalse (getLoc (expr->getExprLoc ()));
156- return emitIntrinsicCallOp (*this , expr, " ctlz" , ops[0 ].getType (),
155+ mlir::Location loc = getLoc (expr->getExprLoc ());
156+ mlir::Value isZeroPoison = builder.getFalse (loc);
157+ return emitIntrinsicCallOp (builder, loc, " ctlz" , ops[0 ].getType (),
157158 mlir::ValueRange{ops[0 ], isZeroPoison});
158159 }
159160 case X86::BI__builtin_ia32_tzcnt_u16:
160161 case X86::BI__builtin_ia32_tzcnt_u32:
161162 case X86::BI__builtin_ia32_tzcnt_u64: {
162- mlir::Value isZeroPoison = builder.getFalse (getLoc (expr->getExprLoc ()));
163- return emitIntrinsicCallOp (*this , expr, " cttz" , ops[0 ].getType (),
163+ mlir::Location loc = getLoc (expr->getExprLoc ());
164+ mlir::Value isZeroPoison = builder.getFalse (loc);
165+ return emitIntrinsicCallOp (builder, loc, " cttz" , ops[0 ].getType (),
164166 mlir::ValueRange{ops[0 ], isZeroPoison});
165167 }
166168 case X86::BI__builtin_ia32_undef128:
@@ -216,14 +218,14 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
216218 mlir::Location loc = getLoc (expr->getExprLoc ());
217219 Address tmp = createMemTemp (expr->getArg (0 )->getType (), loc);
218220 builder.createStore (loc, ops[0 ], tmp);
219- return emitIntrinsicCallOp (* this , expr , " x86.sse.ldmxcsr" ,
221+ return emitIntrinsicCallOp (builder, loc , " x86.sse.ldmxcsr" ,
220222 builder.getVoidTy (), tmp.getPointer ());
221223 }
222224 case X86::BI_mm_getcsr:
223225 case X86::BI__builtin_ia32_stmxcsr: {
224226 mlir::Location loc = getLoc (expr->getExprLoc ());
225227 Address tmp = createMemTemp (expr->getType (), loc);
226- emitIntrinsicCallOp (* this , expr , " x86.sse.stmxcsr" , builder.getVoidTy (),
228+ emitIntrinsicCallOp (builder, loc , " x86.sse.stmxcsr" , builder.getVoidTy (),
227229 tmp.getPointer ());
228230 return builder.createLoad (loc, tmp);
229231 }
@@ -605,50 +607,48 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
605607 case X86::BI__builtin_ia32_kshiftlihi:
606608 case X86::BI__builtin_ia32_kshiftlisi:
607609 case X86::BI__builtin_ia32_kshiftlidi: {
610+ mlir::Location loc = getLoc (expr->getExprLoc ());
608611 unsigned shiftVal =
609612 ops[1 ].getDefiningOp <cir::ConstantOp>().getIntValue ().getZExtValue () &
610613 0xff ;
611614 unsigned numElems = cast<cir::IntType>(ops[0 ].getType ()).getWidth ();
612615
613616 if (shiftVal >= numElems)
614- return builder.getNullValue (ops[0 ].getType (), getLoc (expr-> getExprLoc ()) );
617+ return builder.getNullValue (ops[0 ].getType (), loc );
615618
616- mlir::Value in = getMaskVecValue (* this , expr , ops[0 ], numElems);
619+ mlir::Value in = getMaskVecValue (builder, loc , ops[0 ], numElems);
617620
618621 SmallVector<mlir::Attribute, 64 > indices;
619622 mlir::Type i32Ty = builder.getSInt32Ty ();
620623 for (auto i : llvm::seq<unsigned >(0 , numElems))
621624 indices.push_back (cir::IntAttr::get (i32Ty, numElems + i - shiftVal));
622625
623- mlir::Value zero =
624- builder.getNullValue (in.getType (), getLoc (expr->getExprLoc ()));
625- mlir::Value sv =
626- builder.createVecShuffle (getLoc (expr->getExprLoc ()), zero, in, indices);
626+ mlir::Value zero = builder.getNullValue (in.getType (), loc);
627+ mlir::Value sv = builder.createVecShuffle (loc, zero, in, indices);
627628 return builder.createBitcast (sv, ops[0 ].getType ());
628629 }
629630 case X86::BI__builtin_ia32_kshiftriqi:
630631 case X86::BI__builtin_ia32_kshiftrihi:
631632 case X86::BI__builtin_ia32_kshiftrisi:
632633 case X86::BI__builtin_ia32_kshiftridi: {
634+ mlir::Location loc = getLoc (expr->getExprLoc ());
633635 unsigned shiftVal =
634636 ops[1 ].getDefiningOp <cir::ConstantOp>().getIntValue ().getZExtValue () &
635637 0xff ;
636638 unsigned numElems = cast<cir::IntType>(ops[0 ].getType ()).getWidth ();
637639
638640 if (shiftVal >= numElems)
639- return builder.getNullValue (ops[0 ].getType (), getLoc (expr-> getExprLoc ()) );
641+ return builder.getNullValue (ops[0 ].getType (), loc );
640642
641- mlir::Value in = getMaskVecValue (* this , expr , ops[0 ], numElems);
643+ mlir::Value in = getMaskVecValue (builder, loc , ops[0 ], numElems);
642644
643645 SmallVector<mlir::Attribute, 64 > indices;
644646 mlir::Type i32Ty = builder.getSInt32Ty ();
645647 for (auto i : llvm::seq<unsigned >(0 , numElems))
646648 indices.push_back (cir::IntAttr::get (i32Ty, i + shiftVal));
647649
648- mlir::Value zero =
649- builder.getNullValue (in.getType (), getLoc (expr->getExprLoc ()));
650- mlir::Value sv =
651- builder.createVecShuffle (getLoc (expr->getExprLoc ()), in, zero, indices);
650+ mlir::Value zero = builder.getNullValue (in.getType (), loc);
651+ mlir::Value sv = builder.createVecShuffle (loc, in, zero, indices);
652652 return builder.createBitcast (sv, ops[0 ].getType ());
653653 }
654654 case X86::BI__builtin_ia32_vprotbi:
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