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[RISCV] Pre-commit test
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‎llvm/test/CodeGen/RISCV/rv32xandesperf.ll‎

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; RUN: llc -O0 -mtriple=riscv32 -mattr=+xandesperf -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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; NDS.BBC
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define i32 @bbc(i32 %a) nounwind {
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; CHECK-LABEL: bbc:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 15
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; CHECK-NEXT: bgez a0, .LBB0_2
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; CHECK-NEXT: j .LBB0_1
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; CHECK-NEXT: .LBB0_1: # %f
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; CHECK-NEXT: li a0, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_2: # %t
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; CHECK-NEXT: li a0, 1
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; CHECK-NEXT: ret
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%mask = shl i32 1, 16
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%and = and i32 %a, %mask
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%tst = icmp eq i32 %and, 0
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br i1 %tst, label %t, label %f
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f:
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ret i32 0
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t:
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ret i32 1
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}
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define i32 @select_bbc(i32 %a, i32 %b, i32 %c) nounwind {
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; CHECK-LABEL: select_bbc:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw a2, 8(sp) # 4-byte Folded Spill
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; CHECK-NEXT: slli a0, a0, 15
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; CHECK-NEXT: sw a1, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: bgez a0, .LBB1_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
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; CHECK-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: .LBB1_2:
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; CHECK-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%mask = shl i32 1, 16
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%and = and i32 %a, %mask
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%tst = icmp eq i32 %and, 0
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%ret = select i1 %tst, i32 %b, i32 %c
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ret i32 %ret
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}
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; NDS.BBS
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define i32 @bbs(i32 %a) nounwind {
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; CHECK-LABEL: bbs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 15
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; CHECK-NEXT: bltz a0, .LBB2_2
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; CHECK-NEXT: j .LBB2_1
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; CHECK-NEXT: .LBB2_1: # %f
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; CHECK-NEXT: li a0, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB2_2: # %t
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; CHECK-NEXT: li a0, 1
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; CHECK-NEXT: ret
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%mask = shl i32 1, 16
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%and = and i32 %a, %mask
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%tst = icmp ne i32 %and, 0
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br i1 %tst, label %t, label %f
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f:
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ret i32 0
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t:
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ret i32 1
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}
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define i32 @select_bbs(i32 %a, i32 %b, i32 %c) nounwind {
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; CHECK-LABEL: select_bbs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw a2, 8(sp) # 4-byte Folded Spill
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; CHECK-NEXT: slli a0, a0, 15
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; CHECK-NEXT: sw a1, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: bltz a0, .LBB3_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
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; CHECK-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: .LBB3_2:
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; CHECK-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%mask = shl i32 1, 16
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%and = and i32 %a, %mask
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%tst = icmp ne i32 %and, 0
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%ret = select i1 %tst, i32 %b, i32 %c
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ret i32 %ret
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}
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; NDS.BEQC
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define i32 @beqc(i32 %a) nounwind {
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; CHECK-LABEL: beqc:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a1, 5
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; CHECK-NEXT: beq a0, a1, .LBB4_2
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; CHECK-NEXT: j .LBB4_1
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; CHECK-NEXT: .LBB4_1: # %f
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; CHECK-NEXT: li a0, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB4_2: # %t
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; CHECK-NEXT: li a0, 1
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; CHECK-NEXT: ret
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%tst = icmp eq i32 %a, 5
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br i1 %tst, label %t, label %f
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f:
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ret i32 0
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t:
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ret i32 1
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}
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define i32 @select_beqc(i32 %a, i32 %b, i32 %c) nounwind {
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; CHECK-LABEL: select_beqc:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw a2, 8(sp) # 4-byte Folded Spill
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; CHECK-NEXT: mv a2, a1
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; CHECK-NEXT: li a1, 5
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; CHECK-NEXT: sw a2, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: beq a0, a1, .LBB5_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
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; CHECK-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: .LBB5_2:
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; CHECK-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%tst = icmp eq i32 %a, 5
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%ret = select i1 %tst, i32 %b, i32 %c
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ret i32 %ret
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}
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; NDS.BNEC
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define i32 @bnec(i32 %a) nounwind {
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; CHECK-LABEL: bnec:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a1, 5
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; CHECK-NEXT: bne a0, a1, .LBB6_2
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; CHECK-NEXT: j .LBB6_1
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; CHECK-NEXT: .LBB6_1: # %f
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; CHECK-NEXT: li a0, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB6_2: # %t
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; CHECK-NEXT: li a0, 1
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; CHECK-NEXT: ret
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%tst = icmp ne i32 %a, 5
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br i1 %tst, label %t, label %f
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f:
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ret i32 0
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t:
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ret i32 1
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}
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define i32 @select_bnec(i32 %a, i32 %b, i32 %c) nounwind {
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; CHECK-LABEL: select_bnec:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw a2, 8(sp) # 4-byte Folded Spill
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; CHECK-NEXT: mv a2, a1
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; CHECK-NEXT: li a1, 5
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; CHECK-NEXT: sw a2, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: bne a0, a1, .LBB7_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
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; CHECK-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: .LBB7_2:
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; CHECK-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%tst = icmp ne i32 %a, 5
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%ret = select i1 %tst, i32 %b, i32 %c
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ret i32 %ret
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}
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; NDS.BFOZ
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; MSB >= LSB

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