[Quasar] Trisc3 + SFPU #1353
Description
This is a master issue because I believe there are multiple steps to achieve the intended goal, which is enabling TRISC3 to be used fro SFPU operations in Quasar. The sub issues are:
- Need to enable compile for Trisc3 to start, and ensure it is out of reset
- Write the first test for TRISC3 thread that uses UNPACK2 + SrcS + SFPU + PACK1
- Expand above test for two input operands
- Expand above test for one Dest and one SrcS input operand, packing out from SrcS
- Expand above test for packing out from Dest
- Need to see how to compile SFPI for trisc3 when that becomes available: https://github.com/tenstorrent/tt-llk/compare/main...filip/bh-vs-qsr?diff=unified&w=&short_path=443c782#diff-443c78246875676db5b759bfeebc479eb696bed488c048c617639f503acdace1
- Need to see how we architect the programming model to make it easy to program SFPU to access SrcS vs program SFPU for SrcS: [Quasar] SFPU kernels for SrcS vs Dest #855
And on top of that, we need to propagate this up to metal, and figure out how to compile compute kernel APIs to target SFPU for Trisc1 or trisc3
@nvelickovicTT @fvranicTT @vmilicevicTT fyi, this might be P1 instead of P0 because back-compatible SFPU works for now, but this issue is very important for enabling one of the most perf-saving feature in Quasar