Fix translation coordinates for Wormhole for DRAM, ARC and PCIe

[nbuncicTT]

Description

Currently, tt-umd, tt-metal and all of the simulators don't use the translated coordinates for DRAM, ARC and PCIe, but the coordinates responding to the NOC (if NOC0 is used, NOC0 coordinates are used, if NOC1 is used, NOC1 coordinates are used).

This leads to a discrepancy between the coordinates written by ARC in the NOC_ID_LOGICAL register (for Wormhole) and the TRANSLATED coordinate system in UMD (and all other repos).

The NOC_ID_LOGICAL is used by kernels to identify on which tile they are, but this is not a problem in this particular case as DRAM, ARC and PCIe tiles on Wormhole do not execute kernels.

The only thing that is the problem is the discrepancy itself, and that the driver must identify over which NOC it sends the coordinates (which is not the case with TRANSLATED).

There are added tests that show how the mapping is done and how the driver handles this:
#2122

The idea is to fix this and use the real translated coordinate system instead of the way it is now.

Scope

• Fix translated coordinate system in UMD for WH and the before-mentioned cores.
• Apply this fix in tt-metal which currently uses the same pattern as UMD (for NOC0 - NOC0 coords, for NOC1 NOC1 coords)
• Apply the fix in ttsim which doesn't recognize this translation
• Apply this fix elsewhere

Definition of Done

• Successful validation of UMD defined TRANSLATED mapping and value in NOC_ID_LOGICAL register for given tile
• Applied changes throughout all codebases that are impacted by this change