cargo fmt

Author: the-ssd

cranelift/codegen/src/ctxhash.rs

@@ -4,8 +4,8 @@
 //! node-internal data references some other storage (e.g., offsets into
 //! an array or pool of shared data).
 
-use hashbrown::hash_table::HashTable;
 use core::hash::{Hash, Hasher};
+use hashbrown::hash_table::HashTable;
 
 /// Trait that allows for equality comparison given some external
 /// context.

cranelift/codegen/src/ir/jumptable.rs

@@ -114,8 +114,8 @@ mod tests {
     use crate::entity::EntityRef;
     use crate::ir::instructions::ValueListPool;
     use crate::ir::{Block, BlockArg, BlockCall, Value};
-    use alloc::vec::Vec;
     use alloc::string::ToString;
+    use alloc::vec::Vec;
 
     #[test]
     fn empty() {

cranelift/codegen/src/ir/pcc.rs

@@ -77,8 +77,8 @@ use crate::ir::types::*;
 use crate::isa::TargetIsa;
 use crate::machinst::{BlockIndex, LowerBackend, VCode};
 use crate::trace;
-use regalloc2::Function as _;
 use core::fmt;
+use regalloc2::Function as _;
 
 #[cfg(feature = "enable-serde")]
 use serde_derive::{Deserialize, Serialize};

cranelift/codegen/src/isa/aarch64/abi.rs

@@ -12,11 +12,11 @@ use crate::isa::unwind::UnwindInst;
 use crate::isa::winch;
 use crate::machinst::*;
 use crate::settings;
+use alloc::borrow::ToOwned;
 use alloc::boxed::Box;
 use alloc::vec::Vec;
 use regalloc2::{MachineEnv, PReg, PRegSet};
 use smallvec::{SmallVec, smallvec};
-use alloc::borrow::ToOwned;
 use std::sync::OnceLock;
 
 // We use a generic implementation that factors out AArch64 and x64 ABI commonalities, because

cranelift/codegen/src/isa/aarch64/inst/mod.rs

@@ -9,11 +9,11 @@ use crate::{CodegenError, CodegenResult, settings};
 
 use crate::machinst::{PrettyPrint, Reg, RegClass, Writable};
 
+use alloc::string::{String, ToString};
 use alloc::vec::Vec;
+use core::fmt::Write;
 use core::slice;
 use smallvec::{SmallVec, smallvec};
-use core::fmt::Write;
-use alloc::string::{String, ToString};
 
 pub(crate) mod regs;
 pub(crate) use self::regs::*;

cranelift/codegen/src/isa/aarch64/lower/isle.rs

@@ -31,10 +31,10 @@ use crate::{
         abi::ArgPair, ty_bits,
     },
 };
-use core::u32;
-use regalloc2::PReg;
 use alloc::boxed::Box;
 use alloc::vec::Vec;
+use core::u32;
+use regalloc2::PReg;
 
 type BoxCallInfo = Box<CallInfo<ExternalName>>;
 type BoxCallIndInfo = Box<CallInfo<Reg>>;

cranelift/codegen/src/isa/aarch64/mod.rs

@@ -12,10 +12,10 @@ use crate::machinst::{
 };
 use crate::result::CodegenResult;
 use crate::settings as shared_settings;
+use alloc::string::String;
 use alloc::{boxed::Box, vec::Vec};
 use core::fmt;
 use cranelift_control::ControlPlane;
-use alloc::string::String;
 use target_lexicon::{Aarch64Architecture, Architecture, OperatingSystem, Triple};
 
 // New backend:

cranelift/codegen/src/isa/mod.rs

@@ -55,11 +55,11 @@ use crate::settings;
 use crate::settings::Configurable;
 use crate::settings::SetResult;
 use crate::{Reg, flowgraph};
+use alloc::string::String;
 use alloc::{boxed::Box, sync::Arc, vec::Vec};
 use core::fmt;
 use core::fmt::{Debug, Formatter};
 use cranelift_control::ControlPlane;
-use alloc::string::String;
 use target_lexicon::{Architecture, PointerWidth, Triple, triple};
 
 // This module is made public here for benchmarking purposes. No guarantees are

cranelift/codegen/src/isa/pulley_shared/abi.rs

@@ -9,12 +9,12 @@ use crate::{
     machinst::*,
     settings,
 };
+use alloc::borrow::ToOwned;
 use alloc::vec::Vec;
 use core::marker::PhantomData;
 use cranelift_bitset::ScalarBitSet;
 use regalloc2::{MachineEnv, PReg, PRegSet};
 use smallvec::{SmallVec, smallvec};
-use alloc::borrow::ToOwned;
 use std::sync::OnceLock;
 
 /// Support for the Pulley ABI from the callee side (within a function body).

cranelift/codegen/src/isa/pulley_shared/inst/args.rs

@@ -3,9 +3,9 @@
 use super::*;
 use crate::ir::ExternalName;
 use crate::machinst::abi::StackAMode;
+use core::fmt;
 use pulley_interpreter::encode;
 use pulley_interpreter::regs::Reg as _;
-use core::fmt;
 
 /// A macro for defining a newtype of `Reg` that enforces some invariant about
 /// the wrapped `Reg` (such as that it is of a particular register class).