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arch: fw: zephyr based power management
SOF power management architecture description and flows using Zephyr RTOS infrastructure Signed-off-by: Michal Wasko <[email protected]> Co-authored-by: Marcin Maka <[email protected]> Co-authored-by: Deb Taylor <[email protected]>
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‎architectures/firmware/sof-zephyr/rtos_layer/images/power/dsp_fw_power_states.pu‎

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@startuml
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hide empty description
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state "D0 / D0ix" as D0 {
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[*] --> PM_STATE_ACTIVE: Initialization
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PM_STATE_ACTIVE -> PM_STATE_RUNTIME_IDLE
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PM_STATE_RUNTIME_IDLE -> PM_STATE_ACTIVE
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PM_STATE_ACTIVE --> [*]
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}
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[*] --> D0: Go to D0 / Power DSP on
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D0 --> [*]: Go to D3 / Power DSP Off
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/dx_state_transitions.pu‎

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@startuml
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[*] --> D3
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D3 --> D0
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D0 --> D0ix: SET_D0ix(wake = 0)
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D0ix --> D0: SET_D0ix(wake = 1)
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D0ix --> D3: ENTER_DX_STATE
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D0 --> D3: ENTER_DX_STATE
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/flow_disable_d0i3.pu‎

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@startuml
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box "Host" #LightSkyBlue
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participant "Driver" as DRIVER
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end box
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box "SOF" #LightBlue
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participant "Core #0: Zephyr lib" as sof_zephyr_lib
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participant "Zephyr Power Manager" as zephyr_power_manager
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end box
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DRIVER -> sof_zephyr_lib: SET_D0ix(prevent_power_gating = 1) IPC request
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activate sof_zephyr_lib
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sof_zephyr_lib -> zephyr_power_manager: pm_policy_state_lock_get\n(PM_STATE_RUNTIME_IDLE)
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activate zephyr_power_manager
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return
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return SET_D0ix IPC response
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/flow_dsp_idle.pu‎

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@startuml
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box "SOF" #LightBlue
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participant "Core #N: Zephyr lib" as sof_zephyr_lib
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participant "Zephyr Power Manager" as zephyr_power_manager
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participant "Zephyr SoC HAL" as soc_hal
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end box
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box "Hardware" #LightGreen
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participant "Core #N: Control" as core_hw_control
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end box
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opt When Core is Idle
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zephyr_power_manager -> sof_zephyr_lib: pm_policy_next_state (PID: Core #N, ticks)
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activate sof_zephyr_lib
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activate zephyr_power_manager
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sof_zephyr_lib -> zephyr_power_manager: pm_policy_state_lock_get\n(PM_STATE_RUNTIME_IDLE)
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activate zephyr_power_manager
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return
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alt if no lock on D0ix state
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return PM_STATE_RUNTIME_IDLE
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else if there is lock on D0ix state
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return PM_STATE_ACTIVE
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end
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zephyr_power_manager -> soc_hal: pm_power_state_set\n(power_state, PID: Core #N)
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activate soc_hal
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alt If power_state is PM_STATE_IDLE
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soc_hal -> soc_hal: arch_clear_power_gating_prevent (Core #N)
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soc_hal -> core_hw_control: Clear power gating prevent
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else if PM_STATE_RUNTIME_ACTIVE
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soc_hal -> soc_hal: arch_set_power_gating_prevent (Core #N)
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soc_hal -> core_hw_control: Set power gating prevent
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end
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return
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deactivate zephyr_power_manager
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end
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/flow_enable_d0i3.pu‎

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@startuml
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box "Host" #LightSkyBlue
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participant "driver" as driver
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end box
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box "SOF" #LightBlue
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participant "Core #0: Zephyr lib" as sof_zephyr_lib
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participant "Zephyr Power Manager" as zephyr_power_manager
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end box
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driver -> sof_zephyr_lib: SET_D0ix(prevent_power_gating = 0) IPC request
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activate sof_zephyr_lib
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sof_zephyr_lib -> zephyr_power_manager: pm_policy_state_lock_put\n(PM_STATE_RUNTIME_IDLE)
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activate zephyr_power_manager
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return
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sof_zephyr_lib -> zephyr_power_manager: pm_policy_state_lock_is_active\n(PM_STATE_RUNTIME_IDLE)
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activate zephyr_power_manager
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return
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alt if D0ix is still locked
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sof_zephyr_lib --> driver: return ERROR
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note right: Zephyr PM Policy can be used concurrently\nand there can be more then one lock\non D0ix state
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else
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sof_zephyr_lib --> driver: return SUCCESS
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end
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deactivate sof_zephyr_lib
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/flow_primary_core_power_down.pu‎

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@startuml
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scale max 1280 width
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box "Host" #LightSkyBlue
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participant "driver" as driver
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end box
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box "SOF" #LightBlue
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participant "Core #0: Zephyr lib" as sof_zephyr_lib_0
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participant "Zephyr Power Manager" as zephyr_power_manager
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participant "Zephyr SoC HAL" as soc_hal
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end box
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box "Hardware" #LightGreen
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participant "Core #0: Control" as core_hw_control
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end box
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opt If D0ix is enabled
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driver -> sof_zephyr_lib_0: SET_D0ix(prevent D0ix) IPC request
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activate sof_zephyr_lib_0
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sof_zephyr_lib_0 -> zephyr_power_manager: pm_policy_state_lock_get\n(PM_STATE_RUNTIME_IDLE)
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activate zephyr_power_manager
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return
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return
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end
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== DSP FW in PM_STATE_ACTIVE ==
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driver -> sof_zephyr_lib_0: SET_DX(PID: Core #0, D3) IPC request
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activate sof_zephyr_lib_0
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sof_zephyr_lib_0 -> zephyr_power_manager: Read status of secondary cores
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activate zephyr_power_manager
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return
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alt If any secondary core is powered up
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sof_zephyr_lib_0 --> driver: SET_DX(ERROR) IPC response
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else else
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sof_zephyr_lib_0 -> zephyr_power_manager: pm_power_state_force\n(PM_STATE_SOFT_OFF, PID: Core #0)
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activate zephyr_power_manager
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zephyr_power_manager -> soc_hal: pm_power_state_set\n(PM_STATE_SOFT_OFF, PID: Core #0)
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activate soc_hal
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soc_hal -> soc_hal: Save context
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soc_hal -> soc_hal: Prepare restore vector
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return
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return
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return SET_DX(SUCCESS) IPC response
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end
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driver -> core_hw_control: clear power register
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loop Until Core #0 power is down
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driver -> core_hw_control: Read Core #0 power bit
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end
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/flow_secondary_core_boot.pu‎

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@startuml
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box "Host" #LightSkyBlue
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participant "driver" as driver
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end box
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box "SOF" #LightBlue
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participant "Core #0: Zephyr lib" as sof_zephyr_lib_0
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participant "Core #1: FW Init" as fw_init_1
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participant "Zephyr Power Manager" as zephyr_power_manager
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participant "Zephyr SoC HAL" as soc_hal
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end box
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box "Hardware" #LightGreen
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participant "Core #1: Control" as core_control_1
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end box
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opt If D0ix is enabled
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driver -> sof_zephyr_lib_0: SET_D0ix(prevent D0/D0ix) IPC request
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activate sof_zephyr_lib_0
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sof_zephyr_lib_0 -> zephyr_power_manager: pm_policy_state_lock_get\n(PM_STATE_RUNTIME_IDLE)
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activate zephyr_power_manager
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return
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return
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end
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== DSP FW in PM_STATE_ACTIVE ==
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driver -> sof_zephyr_lib_0: SET_DX(PID: Core #1, D0) IPC request
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activate sof_zephyr_lib_0
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sof_zephyr_lib_0 -> soc_hal: arch_start_cpu(PID: Core #1)
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activate soc_hal
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soc_hal -> core_control_1: Set alternate boot vector to FW Init
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note right: Cores share the \nsame FW binary\nand the firmware must be\npresent in SRAM.
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soc_hal -> core_control_1: Set SPA bit
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core_control_1 -> fw_init_1: Start and jump to alternate boot vector
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activate fw_init_1
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fw_init_1 -> fw_init_1: Restore context\nif any saved
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loop Until Core #1 is enabled
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soc_hal -> core_control_1: read power register
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end
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deactivate fw_init_1
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return
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return
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/flow_secondary_core_power_down.pu‎

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@startuml
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scale max 1280 width
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box "Host" #LightSkyBlue
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participant "driver" as driver
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end box
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box "SOF" #LightBlue
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participant "Core #0: Zephyr lib" as sof_zephyr_lib_0
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participant "Zephyr Power Manager" as zephyr_power_manager
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participant "Zephyr SoC HAL" as soc_hal
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end box
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box "Hardware" #LightGreen
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participant "Core #1: Control" as core_1_control
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end box
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opt If D0ix is enabled
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driver -> sof_zephyr_lib_0: SET_D0ix(prevent D0ix) IPC request
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activate sof_zephyr_lib_0
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sof_zephyr_lib_0 -> zephyr_power_manager: pm_policy_state_lock_get\n(PM_STATE_RUNTIME_IDLE)
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activate zephyr_power_manager
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return
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return
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end
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== DSP FW in PM_STATE_ACTIVE ==
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driver -> sof_zephyr_lib_0: SET_DX(PID: Core #1, D3) IPC request
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activate sof_zephyr_lib_0
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sof_zephyr_lib_0 -> zephyr_power_manager: pm_power_state_force\n(PM_STATE_SOFT_OFF, PID: Core #1)
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activate zephyr_power_manager
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zephyr_power_manager -> soc_hal: pm_power_state_set\n(PM_STATE_SOFT_OFF, PID: Core #1)
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activate soc_hal
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soc_hal -> soc_hal: Save context to IMR
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return
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deactivate zephyr_power_manager
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loop Until Core #1 transition to PM_STATE_SOFT_OFF
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sof_zephyr_lib_0 -> zephyr_power_manager: pm_power_state_get(PID: Core #1)
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activate zephyr_power_manager
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return
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end
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sof_zephyr_lib_0 -> soc_hal: arch_stop_cpu(PID: Core #1)
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activate soc_hal
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soc_hal -> core_1_control: clear power bit
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loop Until Core #1 is disabled
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soc_hal -> core_1_control: read power register
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end
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return
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return SET_DX(SUCCESS) IPC response
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@enduml

‎architectures/firmware/sof-zephyr/rtos_layer/images/power/power_components.pu‎

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node sw_driver [
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<b>SW Driver</b>
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* DSP power control over IPC protocol
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]
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node fw [
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<b>SOF Zephyr Library</b>
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* Exposes interface of <i>SOF with XTOS</i> for Host Power IPC handling
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* Executes requested sequence of Zephyr power operations
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* Waits and verifies power request completion
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---
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<b>Zephyr Power Management</b>
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<i>Generic RTOS Power Management service</i>
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* Manages System Power States
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* Manages Power Policies
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* Manages Device Runtime Power
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---
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<b>SoC HAL</b>
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<i>Hardware specific power control</i>
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* Moves SoC and its resources to power state requested by Zephyr
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* Interacts directly with hardware and power registers
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* Suppors different power states depending on the target SoC
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]
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sw_driver -down-> fw : <<IPC>> <b>Set Dx</b> - power state transition D0/D3\n<<IPC>> <b>Set D0ix</b> - power gating override (on/off)

‎architectures/firmware/sof-zephyr/rtos_layer/index.rst‎

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:maxdepth: 1
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zephyr_kernel_overview
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power_management
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io_drivers/index

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