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I don't like the idea of split grounds, because this can easily introduce differences in potential between the left and right grounds. So you need to make sure that you have bridges every lambda/10 or denser, to connect the left and right side. At the port itself, I would close the gap and create a lumped port with port width = trace width down to that ground layer bridge. This ensures that at the port, you properly feed both left and right partial grounds. I would also place vias there to connect any other grounds that you might have. Clean ground path for return current is rather important, split grounds can lead to funny resonances, so be careful with your routing and don't forget to connect all your grounds at less than lambda/10 spacing ... |
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I am attempting to simulate a GCPWG in a 4-layer PCB that has a small first layer substrate thickness. This leads to very thin tracks for higher impedances. To make the tracks wider, I am making a cut to the ground layer below the track (the gray cylinders are the via fence, substrates are not plotted):
In a recent discussion it was suggested for a somewhat similar case that the lumped port should have the same width as the RF trace and of course grounded to the ground plane. But in my case, how to place the port? The port can be wider than the gap and short circuit it, also should it end at the third layer or could it go to the bottom (fourth) layer?
Of course the dimensions are far less than a wavelength so maybe it does not have much effect to the results?
Any suggestions?
Thanks,
Kaj
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