Skip to content

Commit 2c72288

Browse files
thurstondthurstond
committed
[msan] Handle llvm.bitreverse by applying intrinsic to shadow
llvm.bitreverse was incorrectly handled by the heuristic handler, because it did not reverse the bits of the shadow. This updates the instrumentation to use the handler from llvm#114490 and updates the test from llvm#125592
1 parent ea9e174 commit 2c72288

File tree

2 files changed

+34
-17
lines changed

2 files changed

+34
-17
lines changed

‎llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4298,6 +4298,10 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
42984298
case Intrinsic::abs:
42994299
handleAbsIntrinsic(I);
43004300
break;
4301+
case Intrinsic::bitreverse:
4302+
handleIntrinsicByApplyingToShadow(I, I.getIntrinsicID(),
4303+
/*trailingVerbatimArgs*/ 0);
4304+
break;
43014305
case Intrinsic::is_fpclass:
43024306
handleIsFpClass(I);
43034307
break;

‎llvm/test/Instrumentation/MemorySanitizer/bitreverse.ll‎

Lines changed: 30 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
22
; RUN: opt < %s -passes=msan -S | FileCheck %s
33
;
4-
; The heuristic handler for llvm.reverse is incorrect because it doesn't
5-
; reverse the shadow.
6-
;
74
; Forked from llvm/test/CodeGen/X86/bitreverse.ll
85

96
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
@@ -16,8 +13,9 @@ define <2 x i16> @test_bitreverse_v2i16(<2 x i16> %a) nounwind #0 {
1613
; CHECK-SAME: <2 x i16> [[A:%.*]]) #[[ATTR1:[0-9]+]] {
1714
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
1815
; CHECK-NEXT: call void @llvm.donothing()
16+
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[TMP1]])
1917
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[A]])
20-
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr @__msan_retval_tls, align 8
18+
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr @__msan_retval_tls, align 8
2119
; CHECK-NEXT: ret <2 x i16> [[B]]
2220
;
2321
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
@@ -31,8 +29,9 @@ define i64 @test_bitreverse_i64(i64 %a) nounwind #0 {
3129
; CHECK-SAME: i64 [[A:%.*]]) #[[ATTR1]] {
3230
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
3331
; CHECK-NEXT: call void @llvm.donothing()
32+
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[TMP1]])
3433
; CHECK-NEXT: [[B:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[A]])
35-
; CHECK-NEXT: store i64 [[TMP1]], ptr @__msan_retval_tls, align 8
34+
; CHECK-NEXT: store i64 [[TMP2]], ptr @__msan_retval_tls, align 8
3635
; CHECK-NEXT: ret i64 [[B]]
3736
;
3837
%b = call i64 @llvm.bitreverse.i64(i64 %a)
@@ -46,8 +45,9 @@ define i32 @test_bitreverse_i32(i32 %a) nounwind #0 {
4645
; CHECK-SAME: i32 [[A:%.*]]) #[[ATTR1]] {
4746
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8
4847
; CHECK-NEXT: call void @llvm.donothing()
48+
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[TMP1]])
4949
; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A]])
50-
; CHECK-NEXT: store i32 [[TMP1]], ptr @__msan_retval_tls, align 8
50+
; CHECK-NEXT: store i32 [[TMP2]], ptr @__msan_retval_tls, align 8
5151
; CHECK-NEXT: ret i32 [[B]]
5252
;
5353
%b = call i32 @llvm.bitreverse.i32(i32 %a)
@@ -61,8 +61,9 @@ define i24 @test_bitreverse_i24(i24 %a) nounwind #0 {
6161
; CHECK-SAME: i24 [[A:%.*]]) #[[ATTR1]] {
6262
; CHECK-NEXT: [[TMP1:%.*]] = load i24, ptr @__msan_param_tls, align 8
6363
; CHECK-NEXT: call void @llvm.donothing()
64+
; CHECK-NEXT: [[TMP2:%.*]] = call i24 @llvm.bitreverse.i24(i24 [[TMP1]])
6465
; CHECK-NEXT: [[B:%.*]] = call i24 @llvm.bitreverse.i24(i24 [[A]])
65-
; CHECK-NEXT: store i24 [[TMP1]], ptr @__msan_retval_tls, align 8
66+
; CHECK-NEXT: store i24 [[TMP2]], ptr @__msan_retval_tls, align 8
6667
; CHECK-NEXT: ret i24 [[B]]
6768
;
6869
%b = call i24 @llvm.bitreverse.i24(i24 %a)
@@ -76,8 +77,9 @@ define i16 @test_bitreverse_i16(i16 %a) nounwind #0 {
7677
; CHECK-SAME: i16 [[A:%.*]]) #[[ATTR1]] {
7778
; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
7879
; CHECK-NEXT: call void @llvm.donothing()
80+
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[TMP1]])
7981
; CHECK-NEXT: [[B:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[A]])
80-
; CHECK-NEXT: store i16 [[TMP1]], ptr @__msan_retval_tls, align 8
82+
; CHECK-NEXT: store i16 [[TMP2]], ptr @__msan_retval_tls, align 8
8183
; CHECK-NEXT: ret i16 [[B]]
8284
;
8385
%b = call i16 @llvm.bitreverse.i16(i16 %a)
@@ -91,8 +93,9 @@ define i8 @test_bitreverse_i8(i8 %a) #0 {
9193
; CHECK-SAME: i8 [[A:%.*]]) #[[ATTR2:[0-9]+]] {
9294
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 8
9395
; CHECK-NEXT: call void @llvm.donothing()
96+
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP1]])
9497
; CHECK-NEXT: [[B:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[A]])
95-
; CHECK-NEXT: store i8 [[TMP1]], ptr @__msan_retval_tls, align 8
98+
; CHECK-NEXT: store i8 [[TMP2]], ptr @__msan_retval_tls, align 8
9699
; CHECK-NEXT: ret i8 [[B]]
97100
;
98101
%b = call i8 @llvm.bitreverse.i8(i8 %a)
@@ -106,8 +109,9 @@ define i4 @test_bitreverse_i4(i4 %a) #0 {
106109
; CHECK-SAME: i4 [[A:%.*]]) #[[ATTR2]] {
107110
; CHECK-NEXT: [[TMP1:%.*]] = load i4, ptr @__msan_param_tls, align 8
108111
; CHECK-NEXT: call void @llvm.donothing()
112+
; CHECK-NEXT: [[TMP2:%.*]] = call i4 @llvm.bitreverse.i4(i4 [[TMP1]])
109113
; CHECK-NEXT: [[B:%.*]] = call i4 @llvm.bitreverse.i4(i4 [[A]])
110-
; CHECK-NEXT: store i4 [[TMP1]], ptr @__msan_retval_tls, align 8
114+
; CHECK-NEXT: store i4 [[TMP2]], ptr @__msan_retval_tls, align 8
111115
; CHECK-NEXT: ret i4 [[B]]
112116
;
113117
%b = call i4 @llvm.bitreverse.i4(i4 %a)
@@ -120,8 +124,9 @@ define <2 x i16> @fold_v2i16() #0 {
120124
; CHECK-LABEL: define <2 x i16> @fold_v2i16(
121125
; CHECK-SAME: ) #[[ATTR2]] {
122126
; CHECK-NEXT: call void @llvm.donothing()
127+
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> zeroinitializer)
123128
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> <i16 15, i16 3840>)
124-
; CHECK-NEXT: store <2 x i16> zeroinitializer, ptr @__msan_retval_tls, align 8
129+
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr @__msan_retval_tls, align 8
125130
; CHECK-NEXT: ret <2 x i16> [[B]]
126131
;
127132
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> <i16 15, i16 3840>)
@@ -132,8 +137,9 @@ define i24 @fold_i24() #0 {
132137
; CHECK-LABEL: define i24 @fold_i24(
133138
; CHECK-SAME: ) #[[ATTR2]] {
134139
; CHECK-NEXT: call void @llvm.donothing()
140+
; CHECK-NEXT: [[TMP1:%.*]] = call i24 @llvm.bitreverse.i24(i24 0)
135141
; CHECK-NEXT: [[B:%.*]] = call i24 @llvm.bitreverse.i24(i24 4096)
136-
; CHECK-NEXT: store i24 0, ptr @__msan_retval_tls, align 8
142+
; CHECK-NEXT: store i24 [[TMP1]], ptr @__msan_retval_tls, align 8
137143
; CHECK-NEXT: ret i24 [[B]]
138144
;
139145
%b = call i24 @llvm.bitreverse.i24(i24 4096)
@@ -144,8 +150,9 @@ define i8 @fold_i8() #0 {
144150
; CHECK-LABEL: define i8 @fold_i8(
145151
; CHECK-SAME: ) #[[ATTR2]] {
146152
; CHECK-NEXT: call void @llvm.donothing()
153+
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.bitreverse.i8(i8 0)
147154
; CHECK-NEXT: [[B:%.*]] = call i8 @llvm.bitreverse.i8(i8 15)
148-
; CHECK-NEXT: store i8 0, ptr @__msan_retval_tls, align 8
155+
; CHECK-NEXT: store i8 [[TMP1]], ptr @__msan_retval_tls, align 8
149156
; CHECK-NEXT: ret i8 [[B]]
150157
;
151158
%b = call i8 @llvm.bitreverse.i8(i8 15)
@@ -156,8 +163,9 @@ define i4 @fold_i4() #0 {
156163
; CHECK-LABEL: define i4 @fold_i4(
157164
; CHECK-SAME: ) #[[ATTR2]] {
158165
; CHECK-NEXT: call void @llvm.donothing()
166+
; CHECK-NEXT: [[TMP1:%.*]] = call i4 @llvm.bitreverse.i4(i4 0)
159167
; CHECK-NEXT: [[B:%.*]] = call i4 @llvm.bitreverse.i4(i4 -8)
160-
; CHECK-NEXT: store i4 0, ptr @__msan_retval_tls, align 8
168+
; CHECK-NEXT: store i4 [[TMP1]], ptr @__msan_retval_tls, align 8
161169
; CHECK-NEXT: ret i4 [[B]]
162170
;
163171
%b = call i4 @llvm.bitreverse.i4(i4 8)
@@ -171,9 +179,11 @@ define i8 @identity_i8(i8 %a) #0 {
171179
; CHECK-SAME: i8 [[A:%.*]]) #[[ATTR2]] {
172180
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 8
173181
; CHECK-NEXT: call void @llvm.donothing()
182+
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP1]])
174183
; CHECK-NEXT: [[B:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[A]])
184+
; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP2]])
175185
; CHECK-NEXT: [[C:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[B]])
176-
; CHECK-NEXT: store i8 [[TMP1]], ptr @__msan_retval_tls, align 8
186+
; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8
177187
; CHECK-NEXT: ret i8 [[C]]
178188
;
179189
%b = call i8 @llvm.bitreverse.i8(i8 %a)
@@ -186,9 +196,11 @@ define <2 x i16> @identity_v2i16(<2 x i16> %a) #0 {
186196
; CHECK-SAME: <2 x i16> [[A:%.*]]) #[[ATTR2]] {
187197
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
188198
; CHECK-NEXT: call void @llvm.donothing()
199+
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[TMP1]])
189200
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[A]])
201+
; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[TMP2]])
190202
; CHECK-NEXT: [[C:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[B]])
191-
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr @__msan_retval_tls, align 8
203+
; CHECK-NEXT: store <2 x i16> [[TMP3]], ptr @__msan_retval_tls, align 8
192204
; CHECK-NEXT: ret <2 x i16> [[C]]
193205
;
194206
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
@@ -206,8 +218,9 @@ define i528 @large_promotion(i528 %A) nounwind #0 {
206218
; CHECK-SAME: i528 [[A:%.*]]) #[[ATTR1]] {
207219
; CHECK-NEXT: [[TMP1:%.*]] = load i528, ptr @__msan_param_tls, align 8
208220
; CHECK-NEXT: call void @llvm.donothing()
221+
; CHECK-NEXT: [[TMP2:%.*]] = call i528 @llvm.bitreverse.i528(i528 [[TMP1]])
209222
; CHECK-NEXT: [[Z:%.*]] = call i528 @llvm.bitreverse.i528(i528 [[A]])
210-
; CHECK-NEXT: store i528 [[TMP1]], ptr @__msan_retval_tls, align 8
223+
; CHECK-NEXT: store i528 [[TMP2]], ptr @__msan_retval_tls, align 8
211224
; CHECK-NEXT: ret i528 [[Z]]
212225
;
213226
%Z = call i528 @llvm.bitreverse.i528(i528 %A)

0 commit comments

Comments
 (0)