PciIo protocol and IoMmu protocol alignment requirements on HostAddress for Map()

[eeshanl]

Hi all,

I had a question about how we handle/how we should handle non page aligned HostAddress in the PciIo and IoMmu Map().

I ran into an issue on an ARM device where the XHCI driver was doing pool allocations for DMA buffers. We saw that if two allocations occur within the same page, and one gets unmapped via PciIoUnmap or IoMmuUnmap, we will also unmap the other allocated address from the IoMmu.

I have created #11656 to address the XHCI concerns, however, there may be other drivers that call Map() with a non page aligned address. Wanted to reach out to seek guidance on if we should enforce all Map operations to be provided a page aligned address.

I see that the intelvtd open-source driver will create a double buffer and re-map the buffer by allocating new pages and copying the data over in its IoMmu implementation. This solution seems to be pretty inefficient in terms of performance and would be better if all the callers of Map() would instead pass in a page aligned address.

Thanks

[spbrogan]

@mdkinney - After doing some additional reading here in the edk2 driver writers guide I am curious why it was suggested to not use common buffers. A common buffer would be more performant and would have significantly less overhead (IOMMU/SMMU hardware is updated with every map/unmap call)?

To help here are a few useful references in code:
VtdDxe - remap condition in map function

VtdDxe - copy on BusMasterWrite in unmap

PR 11382 merged a few months ago was because of a use after free created by the behavior seen in unmap link above. I would expect there could be other drivers with a similar problem.

[mdkinney]

On some systems, common buffers may be fixed/limited resources. Perhaps SRAM. The use should be limited to use cases where simultaneous access from CPU and DMA bus master is required such as a command mailbox. One directional data transfers must not use common buffers.