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[Doc] Optimize the quickstart guide for clarity and not just for CUDA (#858)
* Refactor matmul example to include ReLU activation and update batch size in benchmark script * lint fix
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README.md

Lines changed: 36 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -123,35 +123,24 @@ Below is an example that demonstrates more advanced features: layout annotation,
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```python
124124
import tilelang
125125
import tilelang.language as T
126-
# `make_mma_swizzle_layout` is a python defined layout function
127-
# specifically designed for for MMA operations
128-
# which ensures the consistency with the nvidia CUTLASS Library.
129-
# to avoid bank conflicts and maximize the performance.
130-
from tilelang.intrinsics import (
131-
make_mma_swizzle_layout as make_swizzle_layout,)
132-
133-
# add decorator @tilelang.jit if you want to return a torch function
134-
# @tilelang.jit
126+
127+
# @tilelang.jit(target="cuda")
128+
# target currently can be "cuda" or "hip" or "cpu".
129+
# if not specified, it will be inferred from the input tensors during compile time
130+
@tilelang.jit
135131
def matmul(M, N, K, block_M, block_N, block_K, dtype="float16", accum_dtype="float"):
136132

137133
@T.prim_func
138-
def main(
139-
A: T.Tensor((M, K), dtype),
140-
B: T.Tensor((K, N), dtype),
141-
C: T.Tensor((M, N), dtype),
134+
def matmul_relu_kernel(
135+
A: T.Tensor((M, K), dtype),
136+
B: T.Tensor((K, N), dtype),
137+
C: T.Tensor((M, N), dtype),
142138
):
143139
# Initialize Kernel Context
144140
with T.Kernel(T.ceildiv(N, block_N), T.ceildiv(M, block_M), threads=128) as (bx, by):
145141
A_shared = T.alloc_shared((block_M, block_K), dtype)
146142
B_shared = T.alloc_shared((block_K, block_N), dtype)
147-
C_local = T.alloc_fragment((block_M, block_N), accum_dtype)
148-
149-
# Apply layout optimizations or define your own layout (Optional)
150-
# If not specified, we will deduce the layout automatically
151-
# T.annotate_layout({
152-
# A_shared: make_swizzle_layout(A_shared),
153-
# B_shared: make_swizzle_layout(B_shared),
154-
# })
143+
C_local = T.alloc_fragment((block_M, block_N), accum_dtype)
155144

156145
# Enable rasterization for better L2 cache locality (Optional)
157146
# T.use_swizzle(panel_size=10, enable=True)
@@ -164,53 +153,58 @@ def matmul(M, N, K, block_M, block_N, block_K, dtype="float16", accum_dtype="flo
164153
# This is a sugar syntax for parallelized copy
165154
T.copy(A[by * block_M, ko * block_K], A_shared)
166155

167-
# Demonstrate parallelized copy from global to shared for B
168-
for k, j in T.Parallel(block_K, block_N):
169-
B_shared[k, j] = B[ko * block_K + k, bx * block_N + j]
156+
# Copy tile of B
157+
T.copy(B[ko * block_K, bx * block_N], B_shared)
170158

171159
# Perform a tile-level GEMM on the shared buffers
172160
# Currently we dispatch to the cute/hip on Nvidia/AMD GPUs
173161
T.gemm(A_shared, B_shared, C_local)
162+
163+
# relu
164+
for i, j in T.Parallel(block_M, block_N):
165+
C_local[i, j] = T.max(C_local[i, j], 0)
174166

175167
# Copy result back to global memory
176168
T.copy(C_local, C[by * block_M, bx * block_N])
177169

178-
return main
170+
return matmul_relu_kernel
179171

180172

181-
# 1. Define the kernel (matmul) with the desired dimensions
182-
func = matmul(1024, 1024, 1024, 128, 128, 32)
173+
M = 1024 # M = T.symbolic("m") if you want to use dynamic shape
174+
N = 1024
175+
K = 1024
176+
block_M = 128
177+
block_N = 128
178+
block_K = 32
183179

184-
# 2. Compile the kernel into a torch function
185-
# out_idx specifies the index of the output buffer in the argument list
186-
# if out_idx is specified, the tensor will be created during runtime
187-
# target currently can be "cuda" or "hip" or "cpu".
188-
jit_kernel = tilelang.compile(func, out_idx=[2], target="cuda")
180+
# 1. Define the kernel (matmul) and compile/lower it into an executable module
181+
matmul_relu_kernel = matmul(M, N, K, block_M, block_N, block_K)
189182

190183
# 3. Test the kernel in Python with PyTorch data
191184
import torch
192185

193186
# Create random input tensors on the GPU
194-
a = torch.randn(1024, 1024, device="cuda", dtype=torch.float16)
195-
b = torch.randn(1024, 1024, device="cuda", dtype=torch.float16)
196-
187+
a = torch.randn(M, K, device="cuda", dtype=torch.float16)
188+
b = torch.randn(K, N, device="cuda", dtype=torch.float16)
189+
c = torch.empty(M, N, device="cuda", dtype=torch.float16)
197190

198-
# Run the kernel through the JIT-compiled function
199-
c = jit_kernel(a, b)
191+
# Run the kernel through the Profiler
192+
matmul_relu_kernel(a, b, c)
200193

194+
print(c)
201195
# Reference multiplication using PyTorch
202-
ref_c = a @ b
196+
ref_c = torch.relu(a @ b)
203197

204198
# Validate correctness
205199
torch.testing.assert_close(c, ref_c, rtol=1e-2, atol=1e-2)
206200
print("Kernel output matches PyTorch reference.")
207201

208202
# 4. Retrieve and inspect the generated CUDA source (optional)
209-
cuda_source = jit_kernel.get_kernel_source()
210-
print("Generated CUDA kernel:\n", cuda_source)
203+
# cuda_source = jit_kernel.get_kernel_source()
204+
# print("Generated CUDA kernel:\n", cuda_source)
211205

212-
# 5.Pofile latency with the profiler
213-
profiler = jit_kernel.get_profiler()
206+
# 5.Profile latency with kernel
207+
profiler = matmul_relu_kernel.get_profiler(tensor_supply_type=tilelang.TensorSupplyType.Normal)
214208

215209
latency = profiler.do_bench()
216210

examples/quickstart.py

Lines changed: 15 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1,20 +1,15 @@
11
import tilelang
22
import tilelang.language as T
33

4-
# `make_mma_swizzle_layout` is a python defined layout function
5-
# specifically designed for MMA operations
6-
# which ensures the consistency with the nvidia CUTLASS Library.
7-
# to avoid bank conflicts and maximize the performance.
8-
from tilelang.intrinsics import (
9-
make_mma_swizzle_layout as make_swizzle_layout,) # noqa: F401
104

11-
12-
# add decorator @tilelang.jit if you want to return a torch function
13-
# @tilelang.jit
5+
# @tilelang.jit(target="cuda")
6+
# target currently can be "cuda" or "hip" or "cpu".
7+
# if not specified, it will be inferred from the input tensors during compile time
8+
@tilelang.jit
149
def matmul(M, N, K, block_M, block_N, block_K, dtype="float16", accum_dtype="float"):
1510

1611
@T.prim_func
17-
def main(
12+
def matmul_relu_kernel(
1813
A: T.Tensor((M, K), dtype),
1914
B: T.Tensor((K, N), dtype),
2015
C: T.Tensor((M, N), dtype),
@@ -25,13 +20,6 @@ def main(
2520
B_shared = T.alloc_shared((block_K, block_N), dtype)
2621
C_local = T.alloc_fragment((block_M, block_N), accum_dtype)
2722

28-
# Apply layout optimizations or define your own layout (Optional)
29-
# If not specified, we will deduce the layout automatically
30-
# T.annotate_layout({
31-
# A_shared: make_swizzle_layout(A_shared),
32-
# B_shared: make_swizzle_layout(B_shared),
33-
# })
34-
3523
# Enable rasterization for better L2 cache locality (Optional)
3624
# T.use_swizzle(panel_size=10, enable=True)
3725

@@ -41,8 +29,6 @@ def main(
4129
for ko in T.Pipelined(T.ceildiv(K, block_K), num_stages=3):
4230
# Copy tile of A
4331
# This is a sugar syntax for parallelized copy
44-
# for i, k in T.Parallel(M, block_K):
45-
# A_shared[i, k] = A[by * block_M + i, ko * block_K + k]
4632
T.copy(A[by * block_M, ko * block_K], A_shared)
4733

4834
# Copy tile of B
@@ -52,10 +38,14 @@ def main(
5238
# Currently we dispatch to the cute/hip on Nvidia/AMD GPUs
5339
T.gemm(A_shared, B_shared, C_local)
5440

41+
# relu
42+
for i, j in T.Parallel(block_M, block_N):
43+
C_local[i, j] = T.max(C_local[i, j], 0)
44+
5545
# Copy result back to global memory
5646
T.copy(C_local, C[by * block_M, bx * block_N])
5747

58-
return main
48+
return matmul_relu_kernel
5949

6050

6151
M = 1024 # M = T.symbolic("m") if you want to use dynamic shape
@@ -66,27 +56,22 @@ def main(
6656
block_K = 32
6757

6858
# 1. Define the kernel (matmul) and compile/lower it into an executable module
69-
func = matmul(M, N, K, block_M, block_N, block_K)
70-
71-
# 2. Compile the kernel into a torch function
72-
# out_idx specifies the index of the output buffer in the argument list
73-
# if out_idx is specified, the tensor will be created during runtime
74-
# target currently can be "cuda" or "hip" or "cpu".
75-
jit_kernel = tilelang.compile(func, out_idx=[2], target="cuda")
59+
matmul_relu_kernel = matmul(M, N, K, block_M, block_N, block_K)
7660

7761
# 3. Test the kernel in Python with PyTorch data
7862
import torch
7963

8064
# Create random input tensors on the GPU
8165
a = torch.randn(M, K, device="cuda", dtype=torch.float16)
8266
b = torch.randn(K, N, device="cuda", dtype=torch.float16)
67+
c = torch.empty(M, N, device="cuda", dtype=torch.float16)
8368

8469
# Run the kernel through the Profiler
85-
c = jit_kernel(a, b)
70+
matmul_relu_kernel(a, b, c)
8671

8772
print(c)
8873
# Reference multiplication using PyTorch
89-
ref_c = a @ b
74+
ref_c = torch.relu(a @ b)
9075

9176
# Validate correctness
9277
torch.testing.assert_close(c, ref_c, rtol=1e-2, atol=1e-2)
@@ -97,7 +82,7 @@ def main(
9782
# print("Generated CUDA kernel:\n", cuda_source)
9883

9984
# 5.Profile latency with kernel
100-
profiler = jit_kernel.get_profiler(tensor_supply_type=tilelang.TensorSupplyType.Normal)
85+
profiler = matmul_relu_kernel.get_profiler(tensor_supply_type=tilelang.TensorSupplyType.Normal)
10186

10287
latency = profiler.do_bench()
10388

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