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firelizzard18firelizzard18
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Revert macros
1 parent 6f9a351 commit 1a1b81c

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3 files changed

+29
-29
lines changed

3 files changed

+29
-29
lines changed

‎src/machine/machine_nxpmk66f18.go‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -213,27 +213,27 @@ func (p Pin) Configure(config PinConfig) {
213213
switch config.Mode {
214214
case PinOutput:
215215
gpio.PDDR.SetBits(1 << pos)
216-
pcr.Set(nxp.PORT_PCR0_MUX(1) | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_DSE)
216+
pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_DSE)
217217

218218
case PinOutputOpenDrain:
219219
gpio.PDDR.SetBits(1 << pos)
220-
pcr.Set(nxp.PORT_PCR0_MUX(1) | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_ODE)
220+
pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_ODE)
221221

222222
case PinInput:
223223
gpio.PDDR.ClearBits(1 << pos)
224-
pcr.Set(nxp.PORT_PCR0_MUX(1))
224+
pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos))
225225

226226
case PinInputPullUp:
227227
gpio.PDDR.ClearBits(1 << pos)
228-
pcr.Set(nxp.PORT_PCR0_MUX(1) | nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS)
228+
pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS)
229229

230230
case PinInputPullDown:
231231
gpio.PDDR.ClearBits(1 << pos)
232-
pcr.Set(nxp.PORT_PCR0_MUX(1) | nxp.PORT_PCR0_PE)
232+
pcr.Set((1 << nxp.PORT_PCR0_MUX_Pos) | nxp.PORT_PCR0_PE)
233233

234234
case PinDisable:
235235
gpio.PDDR.ClearBits(1 << pos)
236-
pcr.Set(nxp.PORT_PCR0_MUX(0))
236+
pcr.Set((0 << nxp.PORT_PCR0_MUX_Pos))
237237
}
238238
}
239239

‎src/machine/uart_nxpmk66f18.go‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -106,8 +106,8 @@ func (u UART) Configure(config UARTConfig) {
106106
u.SCGC.Set(u.SCGCMask)
107107

108108
// configure pins
109-
u.DefaultRX.Control().Set(nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS | nxp.PORT_PCR0_PFE | nxp.PORT_PCR0_MUX(3))
110-
u.DefaultTX.Control().Set(nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_SRE | nxp.PORT_PCR0_MUX(3))
109+
u.DefaultRX.Control().Set(nxp.PORT_PCR0_PE | nxp.PORT_PCR0_PS | nxp.PORT_PCR0_PFE | (3 << nxp.PORT_PCR0_MUX_Pos))
110+
u.DefaultTX.Control().Set(nxp.PORT_PCR0_DSE | nxp.PORT_PCR0_SRE | (3 << nxp.PORT_PCR0_MUX_Pos))
111111
u.C1.Set(nxp.UART_C1_ILT)
112112
}
113113

‎src/runtime/runtime_nxpmk66f18.go‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,9 @@ const (
4848
)
4949

5050
var (
51-
_SIM_SOPT2_IRC48SEL = nxp.SIM_SOPT2_PLLFLLSEL(3)
52-
_SMC_PMCTRL_HSRUN = nxp.SMC_PMCTRL_RUNM(3)
53-
_SMC_PMSTAT_HSRUN = nxp.SMC_PMSTAT_PMSTAT(0x80)
51+
_SIM_SOPT2_IRC48SEL = uint32(3 << nxp.SIM_SOPT2_PLLFLLSEL_Pos)
52+
_SMC_PMCTRL_HSRUN = uint8(3 << nxp.SMC_PMCTRL_RUNM_Pos)
53+
_SMC_PMSTAT_HSRUN = uint8(0x80 << nxp.SMC_PMSTAT_PMSTAT_Pos)
5454
)
5555

5656
//go:export Reset_Handler
@@ -107,17 +107,17 @@ func initSystem() {
107107
// enable capacitors for crystal
108108
nxp.OSC.CR.Set(nxp.OSC_CR_SC8P | nxp.OSC_CR_SC2P | nxp.OSC_CR_ERCLKEN)
109109
// enable osc, 8-32 MHz range, low power mode
110-
nxp.MCG.C2.Set(uint8(nxp.MCG_C2_RANGE(2) | nxp.MCG_C2_EREFS))
110+
nxp.MCG.C2.Set(uint8((2 << nxp.MCG_C2_RANGE_Pos) | nxp.MCG_C2_EREFS))
111111
// switch to crystal as clock source, FLL input = 16 MHz / 512
112-
nxp.MCG.C1.Set(uint8(nxp.MCG_C1_CLKS(2) | nxp.MCG_C1_FRDIV(4)))
112+
nxp.MCG.C1.Set(uint8((2 << nxp.MCG_C1_CLKS_Pos) | (4 << nxp.MCG_C1_FRDIV_Pos)))
113113
// wait for crystal oscillator to begin
114114
for !nxp.MCG.S.HasBits(nxp.MCG_S_OSCINIT0) {
115115
}
116116
// wait for FLL to use oscillator
117117
for nxp.MCG.S.HasBits(nxp.MCG_S_IREFST) {
118118
}
119119
// wait for MCGOUT to use oscillator
120-
for (nxp.MCG.S.Get() & nxp.MCG_S_CLKST_Msk) != nxp.MCG_S_CLKST(2) {
120+
for (nxp.MCG.S.Get() & nxp.MCG_S_CLKST_Msk) != (2 << nxp.MCG_S_CLKST_Pos) {
121121
}
122122

123123
// now in FBE mode
@@ -130,8 +130,8 @@ func initSystem() {
130130
nxp.SMC.PMCTRL.Set(_SMC_PMCTRL_HSRUN) // enter HSRUN mode
131131
for nxp.SMC.PMSTAT.Get() != _SMC_PMSTAT_HSRUN {
132132
} // wait for HSRUN
133-
nxp.MCG.C5.Set(nxp.MCG_C5_PRDIV(1))
134-
nxp.MCG.C6.Set(nxp.MCG_C6_PLLS | nxp.MCG_C6_VDIV(29))
133+
nxp.MCG.C5.Set((1 << nxp.MCG_C5_PRDIV_Pos))
134+
nxp.MCG.C6.Set(nxp.MCG_C6_PLLS | (29 << nxp.MCG_C6_VDIV_Pos))
135135

136136
// wait for PLL to start using xtal as its input
137137
for !nxp.MCG.S.HasBits(nxp.MCG_S_PLLST) {
@@ -143,18 +143,18 @@ func initSystem() {
143143

144144
// now program the clock dividers
145145
// config divisors: 180 MHz core, 60 MHz bus, 25.7 MHz flash, USB = IRC48M
146-
nxp.SIM.CLKDIV1.Set(nxp.SIM_CLKDIV1_OUTDIV1(0) | nxp.SIM_CLKDIV1_OUTDIV2(2) | nxp.SIM_CLKDIV1_OUTDIV4(6))
147-
nxp.SIM.CLKDIV2.Set(nxp.SIM_CLKDIV2_USBDIV(0))
146+
nxp.SIM.CLKDIV1.Set((0 << nxp.SIM_CLKDIV1_OUTDIV1_Pos) | (2 << nxp.SIM_CLKDIV1_OUTDIV2_Pos) | (6 << nxp.SIM_CLKDIV1_OUTDIV4_Pos))
147+
nxp.SIM.CLKDIV2.Set((0 << nxp.SIM_CLKDIV2_USBDIV_Pos))
148148

149149
// switch to PLL as clock source, FLL input = 16 MHz / 512
150-
nxp.MCG.C1.Set(nxp.MCG_C1_CLKS(0) | nxp.MCG_C1_FRDIV(4))
150+
nxp.MCG.C1.Set((0 << nxp.MCG_C1_CLKS_Pos) | (4 << nxp.MCG_C1_FRDIV_Pos))
151151
// wait for PLL clock to be used
152-
for (nxp.MCG.S.Get() & nxp.MCG_S_CLKST_Msk) != nxp.MCG_S_CLKST(3) {
152+
for (nxp.MCG.S.Get() & nxp.MCG_S_CLKST_Msk) != (3 << nxp.MCG_S_CLKST_Pos) {
153153
}
154154
// now we're in PEE mode
155155
// trace is CPU clock, CLKOUT=OSCERCLK0
156156
// USB uses IRC48
157-
nxp.SIM.SOPT2.Set(nxp.SIM_SOPT2_USBSRC | _SIM_SOPT2_IRC48SEL | nxp.SIM_SOPT2_TRACECLKSEL | nxp.SIM_SOPT2_CLKOUTSEL(6))
157+
nxp.SIM.SOPT2.Set(nxp.SIM_SOPT2_USBSRC | _SIM_SOPT2_IRC48SEL | nxp.SIM_SOPT2_TRACECLKSEL | (6 << nxp.SIM_SOPT2_CLKOUTSEL_Pos))
158158

159159
// If the RTC oscillator isn't enabled, get it started. For Teensy 3.6
160160
// we don't do this early. See comment above about slow rising power.
@@ -167,7 +167,7 @@ func initSystem() {
167167
nxp.SysTick.RVR.Set(cyclesPerMilli - 1)
168168
nxp.SysTick.CVR.Set(0)
169169
nxp.SysTick.CSR.Set(nxp.SysTick_CSR_CLKSOURCE | nxp.SysTick_CSR_TICKINT | nxp.SysTick_CSR_ENABLE)
170-
nxp.SystemControl.SHPR3.Set(nxp.SystemControl_SHPR3_PRI_15(32) | nxp.SystemControl_SHPR3_PRI_14(32)) // set systick and pendsv priority to 32
170+
nxp.SystemControl.SHPR3.Set((32 << nxp.SystemControl_SHPR3_PRI_15_Pos) | (32 << nxp.SystemControl_SHPR3_PRI_14_Pos)) // set systick and pendsv priority to 32
171171
}
172172

173173
func initInternal() {
@@ -198,32 +198,32 @@ func initInternal() {
198198
nxp.FTM3.C6SC.Set(0x28)
199199
nxp.FTM3.C7SC.Set(0x28)
200200

201-
nxp.FTM0.SC.Set(nxp.FTM_SC_CLKS(1) | nxp.FTM_SC_PS(_DEFAULT_FTM_PRESCALE))
201+
nxp.FTM0.SC.Set((1 << nxp.FTM_SC_CLKS_Pos) | (_DEFAULT_FTM_PRESCALE << nxp.FTM_SC_PS_Pos))
202202
nxp.FTM1.CNT.Set(0)
203203
nxp.FTM1.MOD.Set(_DEFAULT_FTM_MOD)
204204
nxp.FTM1.C0SC.Set(0x28)
205205
nxp.FTM1.C1SC.Set(0x28)
206-
nxp.FTM1.SC.Set(nxp.FTM_SC_CLKS(1) | nxp.FTM_SC_PS(_DEFAULT_FTM_PRESCALE))
206+
nxp.FTM1.SC.Set((1 << nxp.FTM_SC_CLKS_Pos) | (_DEFAULT_FTM_PRESCALE << nxp.FTM_SC_PS_Pos))
207207

208208
// nxp.FTM2.CNT.Set(0)
209209
// nxp.FTM2.MOD.Set(_DEFAULT_FTM_MOD)
210210
// nxp.FTM2.C0SC.Set(0x28)
211211
// nxp.FTM2.C1SC.Set(0x28)
212-
// nxp.FTM2.SC.Set(nxp.FTM_SC_CLKS(1) | nxp.FTM_SC_PS(_DEFAULT_FTM_PRESCALE))
212+
// nxp.FTM2.SC.Set((1 << nxp.FTM_SC_CLKS_Pos) | (_DEFAULT_FTM_PRESCALE << nxp.FTM_SC_PS_Pos))
213213

214214
nxp.FTM3.CNT.Set(0)
215215
nxp.FTM3.MOD.Set(_DEFAULT_FTM_MOD)
216216
nxp.FTM3.C0SC.Set(0x28)
217217
nxp.FTM3.C1SC.Set(0x28)
218-
nxp.FTM3.SC.Set(nxp.FTM_SC_CLKS(1) | nxp.FTM_SC_PS(_DEFAULT_FTM_PRESCALE))
218+
nxp.FTM3.SC.Set((1 << nxp.FTM_SC_CLKS_Pos) | (_DEFAULT_FTM_PRESCALE << nxp.FTM_SC_PS_Pos))
219219

220220
nxp.SIM.SCGC2.SetBits(nxp.SIM_SCGC2_TPM1)
221-
nxp.SIM.SOPT2.SetBits(nxp.SIM_SOPT2_TPMSRC(2))
221+
nxp.SIM.SOPT2.SetBits((2 << nxp.SIM_SOPT2_TPMSRC_Pos))
222222
nxp.TPM1.CNT.Set(0)
223223
nxp.TPM1.MOD.Set(32767)
224224
nxp.TPM1.C0SC.Set(0x28)
225225
nxp.TPM1.C1SC.Set(0x28)
226-
nxp.TPM1.SC.Set(nxp.FTM_SC_CLKS(1) | nxp.FTM_SC_PS(0))
226+
nxp.TPM1.SC.Set((1 << nxp.FTM_SC_CLKS_Pos) | (0 << nxp.FTM_SC_PS_Pos))
227227

228228
// configure the low-power timer
229229
nxp.SIM.SCGC5.SetBits(nxp.SIM_SCGC5_LPTMR)
@@ -332,7 +332,7 @@ func sleepTicks(duration timeUnit) {
332332
return
333333
}
334334

335-
nxp.LPTMR0.PSR.Set(nxp.LPTMR0_PSR_PCS(3) | nxp.LPTMR0_PSR_PBYP) // use 16MHz clock, undivided
335+
nxp.LPTMR0.PSR.Set((3 << nxp.LPTMR0_PSR_PCS_Pos) | nxp.LPTMR0_PSR_PBYP) // use 16MHz clock, undivided
336336

337337
for now < end {
338338
count := uint32(end-now) / cyclesPerMicro

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